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ricks
Visitor
Visitor
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Registered: ‎01-13-2021

ZC706 I/O Series Termination, Source Resistance

We are using the the ZC706 to drive (and receive) a large number of single-ended LVCMOS2.5V signals connected to our own custom board via the HPC J37 connector. I am not a hi-speed expert but know enough to be dangerous.  The ug471_7Series_SelectIO.pdf manual describes some of the controls such as fast and slow slew rate and drive currents, but it does not address how these controls effect the source resistance.  The lines on the PCB are Zo = 50 ohms, but ideally you want to set the drivers to have a close to or matched equivalent source termination resistance at the driver output (since load termination would be impractical and draw too much current).  There are no external series output resistors on the ZC706 Eval Board.   Is there any way to program that series resistance?  Also what is the relationship between drive current settings and equivalent source resistance?  What are the slew rates for the fast and slow settings and how do they effect source resistance?

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nwillard
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Registered: ‎10-13-2015

Please reference https://www.xilinx.com/support/documentation/user_guides/ug933-Zynq-7000-PCB.pdf

Weak LVCMOS drivers of 6 mA to 8 mA drive strength have an output impedance approximately equal to
50Ω (Figure 4-3).

IBIS models can help with additional content.

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ricks
Visitor
Visitor
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Registered: ‎01-13-2021

Dear Neil, this helps a lot but I do have some follow up questions.

1. There is an inconsistency about the slew rate.  On page 45 it says; 

Weak LVCMOS drivers of

6 mA to 8 mA drive strength have an output impedance approximately equal to

50Ω (Figure 4-3).

On Page 43 it says:

LVCMOS, when set to 6 mA DRIVE and FAST slew, has an approximate output impedance

close to 50Ω , allowing it to be used as a crude approximation of a controlled-impedance

driver.

Page 43 seems to indicate that the slew rate being fast plays into the output impedance where Page 45 seems to imply it is independent of slew rate.  I would think we would want to run at the slower slew if we can.

2. Is the output impedance a linear function of just the drive current?  For example, if the drive current for the LVCMOS is set to 6-8ma producing a source impedance of roughly 50 ohms, does 12-14ma produce a source impedance of 25 ohms?

3. I don't see a mention for the effective rise times vs. the fast and slow slew rate settings?  What are they?

Thanks for your help,

Rick

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nwillard
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Contributor
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Registered: ‎10-13-2015

That level of detail is not in the datasheet/user guide. Please create an IBIS simulation based on your use case per the instructions in DS191.

 

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ricks
Visitor
Visitor
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Registered: ‎01-13-2021

Thanks, Neil.  We can't afford Hyperlynx and we are trying to get some help, but I think that this is something that Xilinx should address in more detail.  I think the questions I'm asking are reasonable.

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