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Visitor
Visitor
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Registered: ‎03-10-2020

ZYNQ 7030 Power sequencing

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Good day,

I am validating the power-up/power-down sequence on a board with a ZYNQ 7030. I am not sure on how to interpret the following statement from DS191, page 9 : 

The recommended power-off sequence is the reverse of the power-on sequence. If VCCPAUX, VCCPLL, and the PS VCCO
supplies (VCCO_MIO0, VCCO_MIO1, and VCCO_DDR) have the same recommended voltage levels, then they can be powered
by the same supply and ramped simultaneously. Xilinx recommends powering VCCPLL with the same supply as VCCPAUX,
with an optional ferrite bead filter. Before VCCPINT reaches 0.80V at least one of the four following conditions is required
during the power-off stage: the PS_POR_B input is asserted to GND, the reference clock to the PS_CLK input is disabled,
VCCPAUX is lower than 0.70V, or VCCO_MIO0 is lower than 0.90V. The condition must be held until VCCPINT reaches 0.40V to
ensure PS eFUSE integrity.

Out of the 4 conditions stated, the board I have meets 3, which is fine, since only 1 is required. My concern is with the sequence. According to the first sentence, VCCPAUX should drop before VCCPINT. It does, except my supply rails drop slowly due to capacitance on the rail. So when when VCCPINT starts dropping, VCCPAUX is not quite done (see attached 019.jpg). Can this be a problem? How do I know at which voltage the ZYNQ considers the supply rail to be turned off?

Details on 019.jpg : 

- Yellow is VCCPAUX

- Blue is VCCPINT

- We can see that VCCPAUX starts dropping before VCCPINT does, but when VCCPINT starts dropping, VCCPAUX has only dropped about half way.

 

Any thoughts/help is appreciated. Thanks!

Olivier

 

019.jpg
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Highlighted
Teacher
Teacher
223 Views
Registered: ‎07-09-2009

Re: ZYNQ 7030 Power sequencing

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Taking a step back,

Power off , 

What its really saying is, don't leave one of the supplies on, 

In the general case, as power is removed, the supplies are going to collapse fairly fast, 

    the concern is if one supply fails, and one the rest stay up,  

       if you stay in this situation, the FPGA is going to heat up,  

       not as much as when its under full load, but if your fan / cooling has also died with that one rail, then your in trouble,

 

Generally, if all powers drop off, dont worry.

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>

View solution in original post

1 Reply
Highlighted
Teacher
Teacher
224 Views
Registered: ‎07-09-2009

Re: ZYNQ 7030 Power sequencing

Jump to solution

Taking a step back,

Power off , 

What its really saying is, don't leave one of the supplies on, 

In the general case, as power is removed, the supplies are going to collapse fairly fast, 

    the concern is if one supply fails, and one the rest stay up,  

       if you stay in this situation, the FPGA is going to heat up,  

       not as much as when its under full load, but if your fan / cooling has also died with that one rail, then your in trouble,

 

Generally, if all powers drop off, dont worry.

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>

View solution in original post