Zynq7000 MIO QSPI Program

[ishanianu123]

Hello,

We are using Zynq7000 FPGA MIO QSPI interface.

If Xilinx SDK "Program Flash" tool is used to program a bootloader bin file to two QSPIs using qspi_dual_parallel flash type,

what is the address mapping of this operation? How does PS address space FC000000 physically maps to the QSPI address space?

Thank you,

Ishani

[simon · Accepted solution]

Hi @ishanianu123,

The 8-bit parallel I/O configuration also requires that the devices have the same capacity. The
address map for the parallel I/O configuration starts at FC00_0000 and goes to the address of the
combined memory capacities, up to a maximum of FDFF_FFFF (32 MB).

more infor, please see pg342, ug585.

Thanks

Simon