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rourabpaul
Explorer
Explorer
7,410 Views
Registered: ‎08-13-2010

exact meaning of reosurce usage of 7 series FPGA

I want to understand exact resource usage of 7 series FPGA. from map report I found

Slice Logic Utilization:
  Number of Slice Registers:                12,770 out of 106,400   12%
    Number used as Flip Flops:              12,734
    Number used as Latches:                      0
    Number used as Latch-thrus:                  0
    Number used as AND/OR logics:               36
  Number of Slice LUTs:                     16,549 out of  53,200   31%
    Number used as logic:                   15,695 out of  53,200   29%
      Number using O6 output only:          13,614
      Number using O5 output only:             110
      Number using O5 and O6:                1,971
      Number used as ROM:                        0
from data sheet I found I CLB consist 2 slices, 8 LUTs and 16 flipflops,

here in map report what is Number of Slice Registers and Number of Slice LUTs, is the Number of Slice registers is Slice for memory? is the Number of Slice LUTs is Slice for logic? How I would get the number of CLBs consumed by my design

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balkris
Xilinx Employee
Xilinx Employee
7,398 Views
Registered: ‎08-01-2008

that means how much logic occupied by your design.

 

from data sheet I found I CLB consist 2 slices, 8 LUTs and 16 flipflops,

 

That means  1 CLB = 2 slice = 8 LUTS + FLIP flops . 

 

check the details here

http://www.xilinx.com/support/documentation/user_guides/ug474_7Series_CLB.pdf

 

http://www.xilinx.com/support/documentation/data_sheets/ds180_7Series_Overview.pdf

 

https://forums.xilinx.com/t5/7-Series-FPGAs/Slice-components-and-routing/td-p/561218

Thanks and Regards
Balkrishan
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yogesh_tripathi
Adventurer
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Registered: ‎06-27-2016

CLB consist of two slices m/l. Slice(L) can be used for logic and slice(M) for memory however there are some limitation to their uses as logic/distributed ram etc. So it is best to assume your resource utilization with respect to slices used rather than lut's.

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balkris
Xilinx Employee
Xilinx Employee
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Registered: ‎08-01-2008

Yes I think you just check CLB that should give better understanding . the all other logic drived from CLBs only .
Thanks and Regards
Balkrishan
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rourabpaul
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Registered: ‎08-13-2010

If I want to measure total number of slice, will it be  (Slice registers+slice LUTs)?

Is slice LUTs are for logic? and Slice registers for the registers?

 

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balkris
Xilinx Employee
Xilinx Employee
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Registered: ‎08-01-2008

check the slice structure it has everything registers , flops , muxes , LUTs , gates etc

 

check page number 19

http://www.xilinx.com/support/documentation/user_guides/ug474_7Series_CLB.pdf

Thanks and Regards
Balkrishan
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rourabpaul
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Registered: ‎08-13-2010

Thank you for your information, I have seen that document,
My exact query is about the map report, where I found Slice Registers and Slice LUTs. what are the exact role of those in design? How I get the slice M and slice L  consumption of my design

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yogesh_tripathi
Adventurer
Adventurer
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Registered: ‎06-27-2016

Check "ug474".

 

Every slice contains:
• Four logic-function generators (or look-up tables)
• Eight storage elements
• Wide-function multiplexers
• Carry logic
These elements are used by all slices.Only ram and shift register are provided by slice(m).

so lut + reg/ram should give the estimated slices.

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vemulad
Xilinx Employee
Xilinx Employee
7,333 Views
Registered: ‎09-20-2012

Hi @rourabpaul

 

You can check the count of "Number used as Memory":  to find out how many LUT's are used as memory (SLICEM)

Thanks,
Deepika.
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