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Contributor
Contributor
986 Views
Registered: ‎12-30-2017

fixed phase difefrence capture from ad9467 adcs after every on/off

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I’dd like to ask community for advice.
In our system we have kintex7 fpga. We have 16 ad9467 adc whitch I have to capture synchronously from them. In clearly, I want the phase difference of them be fixed after every on/off. For example, imagine the phase difference between adc1 and adc2 is 50 degree, when I plug off the board and then on, I expect the phase difference between adc1 and adc2 be same (50 degree). But I sometimes observe the phase difference shifted one or two clock. What can I do?
My sampling clock is 240 MHz and I attached the component that I use for capturing from adc.

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Contributor
Contributor
1,217 Views
Registered: ‎12-30-2017
Hi Keith
I say 2 adcs are sampling 2 sinusoids, whitch the captured sample of secound one has a phase shift of 90 degree with the other. When i turn off the board and then turn on, I observe that the captured sample of secound one has a phase shift of 180 degree from the other one. Actually phase difference between them shifted 90 degree. Do understand me?
Thes phenoma is happen randomly, this mean i see this shifting in phase observed after some turn off and then on the board and in some other this ins't seen. I capture it with a 240mhz clock. And it is captured on both edges, DDR. I use parallel iddr for capturing adc data and dont use isedes. Can u help me?

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Moderator
Moderator
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Registered: ‎04-18-2011
I can't quite picture it.
Say for instance the 2 ADCs are sampling 2 sinusoids that are 50 degrees out of phase.
Then the data is sent to the FPGA and you capture it with a 240mhz clock? Is it captured on both edges, DDR? Does the ADC send a frame clock?
What are you doing to align the data?
Do you make sure that the reset of the iserdes is de-assertrd Synchronously?

Keith
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Contributor
Contributor
1,218 Views
Registered: ‎12-30-2017
Hi Keith
I say 2 adcs are sampling 2 sinusoids, whitch the captured sample of secound one has a phase shift of 90 degree with the other. When i turn off the board and then turn on, I observe that the captured sample of secound one has a phase shift of 180 degree from the other one. Actually phase difference between them shifted 90 degree. Do understand me?
Thes phenoma is happen randomly, this mean i see this shifting in phase observed after some turn off and then on the board and in some other this ins't seen. I capture it with a 240mhz clock. And it is captured on both edges, DDR. I use parallel iddr for capturing adc data and dont use isedes. Can u help me?

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