04-12-2018 08:22 AM
I am using a ssr_iserdes block in design to receive a serial data of 125MHz with serialization factor as 10.
on board, output 10 bits(of iserdes) are not toggling at all. Where as, if I use a differential buffer inplace of ssr_iserdes, I am able to see output single ended data is toggling.
Any suggestions why would this scenario occur?
Thanks in advance!
04-13-2018 09:23 AM
A great start, well done, amazing how many dont even top level simulate like that.
Time to start debugging.
example. Are you putting into chip the same as your simulation ?
you have a reset in the simulation, is that correct,
your simulation seems to be just the ser des block,
how are you stimulating the simulation ?
are you showing the output pins in your simulation ?