06-17-2016 05:00 AM
In a new design I'm using a Xilinx Artix7 XC7A75T FPGA. The SPI Boot Device is a Winbond W25Q64FV Flash. Boot Mode Inputs M0-M2 can be configured via a DIP Switch on the board. I'm able to program the fpga via JTAG Interface. I was also able to program the Flash via JTAG using Impact. When changing the boot Option, to flash via master spi, the done Signal is not going high. When looking at the SPI Signals I can see the SCLK ( apprx. 3 MHZ) but no edges on FCS_B (Chip Select) and MOSI.
Do you have an idea's what Im doing wrong? The behaviour is the same at power up and for manually loading configuration from Flash using the /program button.
Are there any other signals which need to be on a certain logic level so that the FPGA starts loading configuration data via SPI?
Thanks for your Reply