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greatmaverick
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Explorer
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Registered: ‎04-06-2017

temperature sensor in Virtex-4 FPGA

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As described in the user guide, We can get the temperatue of a transistor in Virtex-4 FPGA through TDP and TDN pins connected to other device recommended in this user guide.
Is the temperatue obtained by this method equal to the junction temperaure of the FPGA? Because I use FPGA in an enironment with very high temperatue, I need to monitor the junction temperatue to ensure it is below the absolute value of 125℃.
If the junction temperature reaches 125℃,what would be the temperature of the metal surface?
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jheslip
Xilinx Employee
Xilinx Employee
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Registered: ‎06-30-2010

I have added some comments in-line:

 

As described in the user guide, We can get the temperature of a transistor in Virtex-4 FPGA through TDP and TDN pins connected to other device recommended in this user guide

> Correct
Is the temperature obtained by this method equal to the junction temperature of the FPGA?

> The diode is in the dies of the device so you are measuring the temperature of the die, there can be some temperature gradient but the die itself couple with the heat spreader of the package will cause the whole par to become uniformly the same temperature over time.   

 

Because I use FPGA in an environment with very high temperature, I need to monitor the junction temperature to ensure it is below the absolute value of 125.

> 125C is the absolute max temperature, what is the temperatures grade of the part, it can be lower than 125 so you really need to make sure it is below the Tj max for the operating condition of the device. You also need to factor in the error associated with how you are using the diode this will depend on the 3rd art chip used. Obviously, in later families with the SysMon and XADC, we have done this for the customers and give a characterized error measurement so it is easier to do.


If the junction temperature reaches 125
℃,what would be the temperature of the metal surface?

> I am not really sure this is relevant here, the Tcase will depend on the board being used, the package type, your environment and airflow etc.. so there are a lot of variables.

What are you proposing, to measure the Tcase to validate your Tj measurement? There is more error associated with this as well and so it is not recommended.

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umamahe
Xilinx Employee
Xilinx Employee
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Registered: ‎08-01-2012

By using Xilinx power tools (XPE/XPA) you can estimate junction temperature first and make sure that junction temperature is below 85 degree C.

 

If your junction temperature is 125 degree C thermal run-away occurs and FPGA may damage permanently.  

 

FYI:  To estimate the power consumption and junction temperature in your FPGA Xilinx provides a complete solution that encompasses power estimators and analyzers, power-driven implementation tool algorithms

 
*    XILINX Power Estimator tool helps to customer to estimate the power roughly before your design implementation. Please refer the below user guide to know the usage of XPE spread sheet. http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/ug440.pdf
 

*    Xilinx Power Analyzer (XPA) tool which delivered along with ISE Design pack help to customer accurate power analysis after design implementation.

 
*    See the Power Solutions page for power estimation guidelines and tools:
    http://www.xilinx.com/products/technology/power.html   
    Download the XPE Spreadsheet for the family you want to use. This page also contains links to Power Estimator guides and White Papers

 

*    From that you have to download &-series XPE Spreadsheets. Please note that you need a Xilinx free membership account to download. Please note that while downloading it will ask about enable/disable macros. You have to enable macros. After downloading spread sheet you properly update your entire clock, logic, IO, BRAM, DCM, etc requirements as per your design. After properly update you can observe all power consumption temperature details in summary page.
 

*    Please visit the below site and refer the bellow documents if you have chance

http://www.xilinx.com/products/technology/power.html

________________________________________________

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jheslip
Xilinx Employee
Xilinx Employee
2,506 Views
Registered: ‎06-30-2010

I have added some comments in-line:

 

As described in the user guide, We can get the temperature of a transistor in Virtex-4 FPGA through TDP and TDN pins connected to other device recommended in this user guide

> Correct
Is the temperature obtained by this method equal to the junction temperature of the FPGA?

> The diode is in the dies of the device so you are measuring the temperature of the die, there can be some temperature gradient but the die itself couple with the heat spreader of the package will cause the whole par to become uniformly the same temperature over time.   

 

Because I use FPGA in an environment with very high temperature, I need to monitor the junction temperature to ensure it is below the absolute value of 125.

> 125C is the absolute max temperature, what is the temperatures grade of the part, it can be lower than 125 so you really need to make sure it is below the Tj max for the operating condition of the device. You also need to factor in the error associated with how you are using the diode this will depend on the 3rd art chip used. Obviously, in later families with the SysMon and XADC, we have done this for the customers and give a characterized error measurement so it is easier to do.


If the junction temperature reaches 125
℃,what would be the temperature of the metal surface?

> I am not really sure this is relevant here, the Tcase will depend on the board being used, the package type, your environment and airflow etc.. so there are a lot of variables.

What are you proposing, to measure the Tcase to validate your Tj measurement? There is more error associated with this as well and so it is not recommended.

-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------

View solution in original post

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greatmaverick
Explorer
Explorer
1,880 Views
Registered: ‎04-06-2017
Thank you for both of you
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