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Voyager
Voyager
2,287 Views
Registered: ‎05-14-2017

vcco vs iostandard type

If a bank has a vcco connected to 2.5v then does that means all iostandard should be define with some similar 2.5v type .

can they be define as anything else

 

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Xilinx Employee
Xilinx Employee
2,275 Views
Registered: ‎02-14-2014

Re: vcco vs iostandard type

Hi @tchin123,

 

All VCCO pins for a given I/O bank must be connected to the same external voltage supply on the board, and as a result all of the
I/O within a given I/O bank must share the same VCCO level. The VCCO voltage must match the requirements for the I/O standards that have been assigned to the I/O bank. An incorrect VCCO voltage can result in loss of functionality or damage to the device.

If you want to know VCCO requirements for each of the supported I/O standards, please check Table 1-55 from below UG -

http://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf (page #98)

Regards,
Ashish
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Scholar
Scholar
2,264 Views
Registered: ‎04-26-2015

Re: vcco vs iostandard type

The VCCO sets what the voltage will actually be, as the FPGA has no regulation circuitry built-in. If you use VCCO = 2.5V but set the I/O standard to LVCMOS18 or LVCMOS33, you're still going to get a 2.5V output. It's pretty hard to see why you'd use anything other than LVCMOS25 in this case.

 

The exception is for the differential signals, which don't use a set voltage. A common example is LVDS with VCCO = 3.3V. Despite there being no LVDS_33 standard, the 7-series FPGAs can actually use the LVDS_25 setting with VCCO = 3.3V. However, the internal termination must be disabled (hardware limitation) and you can only receive data, not transmit it.

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Voyager
Voyager
2,252 Views
Registered: ‎05-14-2017

Re: vcco vs iostandard type

OK, if all VCCO for  a particular bank is connected to 2.5v then if I specified LCMOS33 or LVCMOS18 to a pin in the same bank then Vivado wouldn't complain and the output only switches at 2.5v anyway and not at the IOstandard voltage that I specified

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Guide
Guide
2,229 Views
Registered: ‎01-23-2009

Re: vcco vs iostandard type

OK, if all VCCO for  a particular bank is connected to 2.5v then if I specified LCMOS33 or LVCMOS18 to a pin in the same bank then Vivado wouldn't complain and the output only switches at 2.5v anyway and not at the IOstandard voltage that I specified

 

Sort of. Vivado has no mechanism of knowing what VCCO is actually driven to on the board. If it did, then it would/could complain about trying to set an I/O standard that is incompatible with the VCCO set on the board. But since it doesn't know, it can't complain.

 

What it can tell is if you have different I/Os in the same bank that need different VCCOs. So if you put both an LVCMOS33 and an LVCMOS25 in the same bank, the tools will know that this is impossible. It can't tell you which one is wrong, since, again, it can't actually know what the "real" VCCO is, but it will know that it can't be both, and will issue a critical warning (or an error, I don't remember which).

 

Avrum

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Voyager
Voyager
2,213 Views
Registered: ‎05-14-2017

Re: vcco vs iostandard type

OK, from what I learn in this thread is that The IOstandard definiton for pins for a particular bank should match to the voltage connected to VCCO.

Otherwise, if the IOstandard is defined difference than the VCCO in this bank then the output swing will be VCCO anyway.

I believed, this is the case, right....Thanks

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Scholar
Scholar
2,176 Views
Registered: ‎04-26-2015

Re: vcco vs iostandard type

@tchin123 Yes, that is the case.

 

The chip is only guaranteed to meet the datasheet specifications when you use the "correct" IO standard. If you use LVCMOS18 or LVCMOS33 on a bank powered at 2.5V, there's no guarantee that the IO ports will achieve the desired timing, have the right pull strength, etc. It's possible (although unlikely) that you'll actually do permanent damage to the FPGA by using the wrong standard.

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Visitor
Visitor
183 Views
Registered: ‎07-30-2019

Re: vcco vs iostandard type

That would be a good practice , but in case if your fpga IO standard voltage and current limit matches with input output device to be connected you can use that too but make sure that you are not connecting 2.5v driver supply to 3.3v driver supply or any unequal voltage levels
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