08-18-2015 11:45 PM
I am using 3v high and 3v low as input sine wave i.e, mean of approximately zero .What should be the values for CONFIG_VOLTAGE and CFGBVS. I am getting correct results even when i set the CONFIG as VCC0 :: 3.3V or GND :: 1.8V
Which one should i exactly use ?
08-19-2015 01:56 AM
08-18-2015 11:50 PM - edited 08-18-2015 11:50 PM
You need to check page #33 from below UG to know steps to determine the proper CFGBVS pin settings
08-19-2015 12:16 AM - edited 08-19-2015 12:29 AM
CFGBVS only requires that the pin reach the expected signal switching level relative to Vcco_0. So CFGBVS = VCCO of Bank 0. Please refer http://www.xilinx.com/support/answers/57045.html for more details.
I believe you are using 7-series device. In that case please refer http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf for more details.
The below are some related noting points with respect to your query.
08-19-2015 01:21 AM
The 1.8/3.3/1.5/2.5V are typical/ mean values
08-19-2015 01:22 AM
08-19-2015 01:43 AM
08-19-2015 01:50 AM
i am directly appling sine wave from signal generator.
i am using xc7k325t board.
08-19-2015 01:56 AM
08-19-2015 07:26 AM
DO NOT DO THAT!
The absolute maximum ratings prohibit any voltage below ~ -0.5 volts.
You may destroy the input. The +/- 3 volt signal must be conditioned to make it safe.
A series 100 ohm resistor, with a clamp diode to Vcco from the pin and the other end of the 100 ohm (same as the bank Vcco you use), and a clamp diode from ground to the input pin.
The IO standard you then use will not matter, as you have clamped the signal to the Vcco voltage for that IO pin. You may use any single ended standard and voltage that is convenient (LVCMOS 1.5, 1.8, 2.4, etc.).
08-19-2015 08:03 AM
If the generator has a 50 ohm output impedance, the diodes in the IO structure should clamp the voltage, and keep the device safe as well. Keep the peak positive output voltage at or below the Vcco for the IO bank.