I am working with Zynq platform, and I have built an AXI CDMA core inside the block design. The offset address of axi_cdma_0 is 0x8E20_0000, and the range is 64K as default. There is no timing violation during synthesis and implementation.
When I use XSCT Console to debug this design. I get following error:
xsct% mwr 0x8e200018 0xc0000000 xsct% Memory write error at 0x8E20001C. AP transaction timeout
For the same design, sometimes this error happens, and sometimes it does not. I don't know why and how to debug this error.