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Visitor
Visitor
2,442 Views
Registered: ‎07-15-2013

zc702 DDR DQ/DQs about ECC

In PS7 DDR configuration,

 

effective DRAM bus width selected with 16 bit

 

when ECC is enabled, DQ is [31:0] and DQS is 3 to 0.

when ECC is disabled, DQ is [15:0] and DQS is 1 to 0.

 

if it means ECC active four DDR chips but DRAM bus width still is 16 bit?

 

 

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Scholar
Scholar
2,440 Views
Registered: ‎02-27-2008

Re: zc702 DDR DQ/DQs about ECC

Yes,

 

That is correct.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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