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Visitor rahuljha08
Visitor
100 Views
Registered: ‎06-18-2019

ARTIX7 IBIS model

I am using the FPGA as a receiver and using the Artix 7 IBIS model. I have to select input pin for LVDS_25 for 2.5V or 3.3 V

Now here, there are two option available for selecting the inputs pins.They are:

1. LVDS_25_HR_I

2.LVDS_25_DT_HR_I

I have attached one screenshot for reference.

Can anyone suggest which model name I have to select.

Thanks

Capture5.PNG
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1 Reply
Xilinx Employee
Xilinx Employee
72 Views
Registered: ‎03-07-2018

Re: ARTIX7 IBIS model

Hello @rahuljha08 

If you want to use internal differential termination i.e. DIFF_TERM then use LVDS_25_DT_HR_I otherwise use LVDS_25_HR_I.

Check UG471 (v1.10) (Page 91~92) for more details.

Note : Internal differential termination is should be used for inputs only.

Regards,
Bhushan

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