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Newbie utpalrathod
Newbie
488 Views
Registered: ‎07-24-2018

Can GPIO of FPGA be defined as clock input and output?

Can I use GPIO as clock Input and Output to synchronize my external devices. 

 

e.g. Can Pin number E14 and E15 of Kintex 7 FPGA be defined as clock to sync external device?

 

Thanks

Utpal Rathod

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2 Replies
Moderator
Moderator
476 Views
Registered: ‎09-15-2016

Re: Can GPIO of FPGA be defined as clock input and output?

Hi @utpalrathod

 

It is recommended to use CCIO (clock capable IO) pins for clock input or output ports you wish to synchronize with any external devices.

Which package/ part of Kintex you are targetting? Here is the helpful link for you.

https://www.xilinx.com/support/package-pinout-files/kintex-7-pkgs.html

Regards
Rohit
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Moderator
Moderator
471 Views
Registered: ‎08-08-2017

Re: Can GPIO of FPGA be defined as clock input and output?

Hi @utpalrathod

 

I am not sure about input but you can use GPIO to forward the clock i.e

 

Clock you want to forward to the downstream device  ->  ODDR  (connect output to the GPIO pin)

 

 ODDR is to  keeps the duty cycle and provides the best possible path[Assign Logic '1'  to D1 and  Logic '0' to D2. [This way, the output of the ODDR will generate a high at posedge of the clock and a low at negedge of the clock]

 

Please refer to the 7 series FPGA Libraries Guide for description and instantiation of these primitives

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_2/ug953-vivado-7series-libraries.pdf

 

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