UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor dfoster
Visitor
419 Views
Registered: ‎06-15-2016

FIR Compiler Error at Compile Time

Hi,

 

I'm receiving an error that doesn't seem to be breaking anything but I want to make sure I understand it.  I get 5 printouts of the following:

 

Warning-[EL_WHERE] Assertion or keyboard interrupt
Assertion error or keyboard interrupt during elaboration in:
/\/mf_sys_sim/user_logic1_i/pmt_inst/mf_inst/mf_inst\/U0/I_SYNTH/G_SINGLE_RATE/I_SINGLE_RATE/COMPONENT/...
SINGLE_RATE(SYNTH){private_instance}

Assertion FAILURE at 0 PS in design unit GLOBALS_PKG from process STATIC ELABORATION:
"ERROR: FIR Compiler : fn_str_to_int: Invalid character: in : 58"

 

mf_inst is an instantiation of the FIR Compiler.  I still end up with a seemingly successful compile that allows me to run simulation.

 

Tools: VCS 2014.03, Vivado 2015.2, FIR Compiler 7.2

0 Kudos