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Adventurer
Adventurer
312 Views
Registered: ‎01-28-2013

IO planning project + PS IO pins

Hello!

I'm using IO Wizard for a ZynQ chip in Vivado 2018.2 and all the PS IO pins are marked as read only so I can't place IO ports on them

I've done this before using previous Vivado version which allowed me to map PS I/O pins.

"ports can only be placed in pssio package pins by the constraint file created by the processor subsystem wizard". Any input is appreciated.

Thanks

 

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Moderator
Moderator
173 Views
Registered: ‎09-18-2014

Re: IO planning project + PS IO pins

Tn45eng,

 

Can you share some screen shots to put things into some perspective of what you look to be doing? Are you using the selectIO wizard? If so that is for creating IO logic in conjunction PL IO pins. To configure PS IO pins you need to go through the I/O configuration tab in the Processor Configuration Wizard.

 

Regards,

Tezz

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