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Visitor xiaomin85
Visitor
4,003 Views
Registered: ‎06-03-2013

Interfacing PCI in HP Bank

Hi,

 

Im working on a new program using XC7VX330T-2FFG1761I. The device contains 650 HP IOs and 50 HR IOs.

The HR IO number is not sufficent when I try to interface the PCI local bus. Is there any good idea to solve this problem?

 

TKS in advance.

 

 

 

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3 Replies
Xilinx Employee
Xilinx Employee
3,988 Views
Registered: ‎07-23-2012

Re: Interfacing PCI in HP Bank

Hi,

What is the IOSTANDARD of the PCI local bus? Are the PCI locl bus inputs or output?

If the requirement is to have a VCCO greater than 1.8V then you can't use HP banks.

Regards,
Krishna
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Visitor xiaomin85
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3,974 Views
Registered: ‎06-03-2013

Re: Interfacing PCI in HP Bank

Hi,smarell:

 

PCI IO signaling is 3.3V TTL. I wonder whether that i must do as the xapp520 suggests, using a translator to translate all the 47 signals to 1.8V. It makes the external circuit complicated.

 

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Xilinx Employee
Xilinx Employee
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Registered: ‎01-03-2008

Re: Interfacing PCI in HP Bank

You should use another FPGA family that supports the 3.3V PCI signalling levels.

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