04-30-2014 01:09 AM
05-01-2014 02:56 AM
05-03-2014 06:20 PM
PCI IO signaling is 3.3V TTL. I wonder whether that i must do as the xapp520 suggests, using a translator to translate all the 47 signals to 1.8V. It makes the external circuit complicated.
05-05-2014 07:51 AM
You should use another FPGA family that supports the 3.3V PCI signalling levels.