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Observer rickwebb38
Observer
517 Views
Registered: ‎01-18-2018

Kintex-7 XC7K160T-1FFG676I HP VCCO power pins

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For the above device, are the HP banks 32-34 VCCO power pins connected together internally for each bank?

 

We don't use these HP bank pins, but if we connect 1V8 to one pin of each bank, will this power all HP bank pins?

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Moderator
Moderator
472 Views
Registered: ‎09-18-2014

Re: Kintex-7 XC7K160T-1FFG676I HP VCCO power pins

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Rickwebb38,

 

I understand that each bank has separate VCCO planes, but do the individual VCCO pins within a bank get connected together for that bank, or are the individual VCCO pins for each bank kept separate too?

-They are connected together. 

 

Is there a mapping document that explains what pins are powered from what power pin

-No, because see above answer. Also it's confidential. This is a reason why most if not all semiconductors provide IO models like IBIS and SPICE. 

 

Regards,

Tezz

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3 Replies
Xilinx Employee
Xilinx Employee
507 Views
Registered: ‎03-07-2018

Re: Kintex-7 XC7K160T-1FFG676I HP VCCO power pins

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Hi @rickwebb38

 

We don't use these HP bank pins, but if we connect 1V8 to one pin of each bank, will this power all HP bank pins?

> As per my knowledge, VCCO pins of each bank of FPGA device are independent of each other. So you need to connect power to all VCCO pins.

Check UG471 (v1.10) for more details.

 

Regards,

Bhushan

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Regards,
Bhushan

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Observer rickwebb38
Observer
500 Views
Registered: ‎01-18-2018

Re: Kintex-7 XC7K160T-1FFG676I HP VCCO power pins

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Hi Bushan,

 

I understand that each bank has separate VCCO planes, but do the individual VCCO pins within a bank get connected together for that bank, or are the individual VCCO pins for each bank kept separate too?

 

Is there a mapping document that explains what pins are powered from what power pin?

 

Regards,

rickwebb38

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Moderator
Moderator
473 Views
Registered: ‎09-18-2014

Re: Kintex-7 XC7K160T-1FFG676I HP VCCO power pins

Jump to solution

Rickwebb38,

 

I understand that each bank has separate VCCO planes, but do the individual VCCO pins within a bank get connected together for that bank, or are the individual VCCO pins for each bank kept separate too?

-They are connected together. 

 

Is there a mapping document that explains what pins are powered from what power pin

-No, because see above answer. Also it's confidential. This is a reason why most if not all semiconductors provide IO models like IBIS and SPICE. 

 

Regards,

Tezz

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