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Voyager
Voyager
517 Views
Registered: ‎08-16-2018

LEs and CLBs

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I read somewhere else Logic Elements (LE) are a synthetic figure in order to compare devices and even vendors.

I just noted two FPGAs (different vendors) have similar (100k) LE but quite different (8k for brand "A" vs 38k for brand "B") CLB.

Then I conclude brand A CLBs "do more things"  than brand B's. Is that right so far?

In that case, would brand A be preferable because of finer granularity?

 

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Scholar u4223374
Scholar
501 Views
Registered: ‎04-26-2015

Re: LEs and CLBs

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If two different chips both have 100,000 logic cells/elements, that means that (to a first approximation) they will fit the same amount of logic. Aspects like functionality of each slice vs number of slices have already been taken into account - you don't need to consider them separately.

 

I assume you were looking at the 10XC105 vs the XC7A100T, with 104K LEs and 101.44K LCs respectively. In terms of LUT numbers, they appear to be pretty close - the Xilinx chip has 15850 slices which translates into 63400 LUTs, the Intel chip has 38000 ALMs which translates into 76000 LUTs. The Xilinx chip has a higher-level structure, the CLB, which is composed of two slices; Intel does not appear to have an equivalent.

 

Having the more complex low-level components (a Xilinx CLB is somewhat similar to four Intel ALMs) will allow Xilinx to restrict the use of large-scale routing resources; a lot of functions can be implemented entirely within a CLB whereas they'd take multiple linked ALMs. On the other hand, that small-scale routing is taking space on the chip, which could otherwise have been used for routing resources - I would expect that the Intel chips probably have more routing available between ALMs.

 

 

1 Reply
Scholar u4223374
Scholar
502 Views
Registered: ‎04-26-2015

Re: LEs and CLBs

Jump to solution

If two different chips both have 100,000 logic cells/elements, that means that (to a first approximation) they will fit the same amount of logic. Aspects like functionality of each slice vs number of slices have already been taken into account - you don't need to consider them separately.

 

I assume you were looking at the 10XC105 vs the XC7A100T, with 104K LEs and 101.44K LCs respectively. In terms of LUT numbers, they appear to be pretty close - the Xilinx chip has 15850 slices which translates into 63400 LUTs, the Intel chip has 38000 ALMs which translates into 76000 LUTs. The Xilinx chip has a higher-level structure, the CLB, which is composed of two slices; Intel does not appear to have an equivalent.

 

Having the more complex low-level components (a Xilinx CLB is somewhat similar to four Intel ALMs) will allow Xilinx to restrict the use of large-scale routing resources; a lot of functions can be implemented entirely within a CLB whereas they'd take multiple linked ALMs. On the other hand, that small-scale routing is taking space on the chip, which could otherwise have been used for routing resources - I would expect that the Intel chips probably have more routing available between ALMs.