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3,997 Views
Registered: ‎08-25-2015

Simulating power cycle using IPROG and JTAG

From the 7 series configuration guide it appears that the WBSTAR register can be set to the starting address of a bitstream in flash and that the JTAG IPROG command can be sent which will cause a warm boot similar to pressing the PROGRAM_B button on the KC705 development board.

 

As part of my research we inject faults into a kintex-7 xc7k325t FPGA. When a fault injection upsets a design we currently do a full reconfig over JTAG. Compared to loading a bitsream in parallel from flash JTAG is very slow.

 

We would like to be able to reload a bitstream from flash upon design disruption. Ideally this would be done over JTAG.

 

When we follow these steps from the configuration guide (p. 140):

 

Configuration
Data (hex)    Explanation
--------------------------------------------------------------------------------------
FFFFFFFF      Dummy Word
AA995566      Sync Word
20000000      Type 1 NO OP
30020001      Type 1 Write 1 Words to WBSTAR
00000000      Warm Boot Start Address (Load the Desired Address)
30008001      Type 1 Write 1 Words to CMD
0000000F      IPROG Command
20000000      Type 1 NO OP

As expected after issuing these commands the DONE pin is set low, but then the chip hangs no reprogramming of the flash occurs.

 

Am I missing a step? I understand that IPROG commands can be built into the bitstream for use over ICAPE2. We would like to have the FPGA program a bitstream in flash that does not have built in IPROG command. This would also be useful for switching between designs under test while the device is running.

 

Is it possible to warm boot via JTAG?

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1 Reply
Newbie gdelubac
Newbie
729 Views
Registered: ‎05-15-2013

Re: Simulating power cycle using IPROG and JTAG

Hi  andrewmkeller,

 

Do you have resolved your problem ?

Because, I have the same behavior.

I can't restart from address 0x0 (golden bitstream).

I can only restart from multi bitstream

Thanks

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