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Adventurer
Adventurer
173 Views
Registered: ‎10-28-2018

Spartan-7 Vref Pins

Hi,

   Is it ok to power the two Vref pins on bank 14 and bank 34 respectively at 2.5V which is my VCCO voltage? 

If it's not ok, can I configure Vref as a regular IO in which supplying 2.5V would be ok? How do I configure Vref as a regular IO? 

 

Thanks

 

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5 Replies
Xilinx Employee
Xilinx Employee
171 Views
Registered: ‎08-10-2008

回复: Spartan-7 Vref Pins

No. If you cannot provide a half-Vcco power rail for the Vref pins, you can just just the INTERNAL Vref attribute and leave the pins as GPIO.

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Adventurer
Adventurer
156 Views
Registered: ‎10-28-2018

回复: Spartan-7 Vref Pins

Hi

  Unfortunately on the PCB, the Vref pins are now connected to 2.5V. It looks like I can salvage this by using the internal Vref attribute. Correct?

How do i turn on INTERNAL Vref attribute?

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Xilinx Employee
Xilinx Employee
136 Views
Registered: ‎08-10-2008

回复: Spartan-7 Vref Pins

INTERNAL_VREF_BANK14 = 0.75;

like this. Check for more info in UG471.

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Adventurer
Adventurer
132 Views
Registered: ‎10-28-2018

回复: Spartan-7 Vref Pins

Thanks. I've set this in Vivado .xdc constraint file as:

 

set_property INTERNAL_VREF 0.9 [get_iobanks 14]
set_property INTERNAL_VREF 0.9 [get_iobanks 34]

   Hope it works. 

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Adventurer
Adventurer
114 Views
Registered: ‎10-28-2018

回复: Spartan-7 Vref Pins

At boot up when nothing is programmed into the Spartan 7, is the internal reference turned on by default? Will the 2.5V on the Vref pins damage the part on boot up? 

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