04-02-2019 06:57 AM
I couldn't figure out where to post this, so my apologies if this isn't the correct place.
I'm looking to use XC2C256-7VQ100I in a design but I'm having an issue in cooling it. I am now looking into top-cooling the part, but could not find the junction-to-case (top) thermal resistance (in °C/W) in order to do so. Could someone please provide that for me?
Additionally, I would like to verify that the junction-to-case (bottom) thermal resistance is indeed the 10.9 °C/W that is listed on the datasheet. Thank you in advance!
04-09-2019 06:34 AM
You can find device specific thermal data here: https://www.xilinx.com/cgi-bin/thermal/thermal.pl
This thermal query tool allows you to choose your device / package combination and see the resulting thermal data.
For the XC2C256-VQ100 part, the following information is provided:
Thermal data summary for XC2C256-VQ100
|Device Family :||CoolRunner-II|
|Device Name :||XC2C256|
|Package Name :||VQ100|
|JA (Still Air)||42.9|
|JA (250 LFM)||35.6|
|JA (500 LFM)||33.2|
|JA (750 LFM)||32.3|
|LFM = Linear Feet per Min|
04-09-2019 07:43 AM
A reasonable and useful rule of thumb is half the power is conducted out the top (with a heatsink and airflow),
And half is conducted out into the pcb through the bottom of the package.
The power estimation spreadsheet is a useful tool to see how much cooling you need.
04-10-2019 03:33 PM
I understand getting these values from the tool, but what I want to do is interpret it. If I want to top-cool this component to a heat sink but only rely on conduction, not blowing air over it as well, I need to be able to understand how much power will want to go up to the heat sink versus down into the board. Is the Theta JC value provided representing the top part of the case (and thus for the top-cooling part) or for the bottom of the case (for the heat going into the PWB)? Since this is not a BGA part that normally gets top-cooled I do not want to just assume X% amount of power goes in each direction.
04-10-2019 06:34 PM
Hi @mturley ，
Theta JC is used for device/package comparison purposes only according to JEDEC four-layer board. And this value is different than the one in your actual board conditions and enviroment. A system-level thermal simulation can help interpret it.