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1,279 Views
Registered: ‎05-05-2018

axi_gpio broken in Petalinux 2018.1?

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I am developing an application for the Digilent Zybo-Z7-20 and I want to make some of the LEDs (connected to the PL) visible to Linux via gpio-leds.  I'm using Vivado and Petalinux 2018.1.  This should be simple, right?

 

Not really...

I added an axi_gpio core to my block design, connected it up, and compiled the FPGA.  I then exported the hardware and imported it to my Petalinux project.  I added some device-tree entries for the LEDs I want to use and rebuilt everything.

Problems:


1) The gpio-xilinx driver fails to load with the following error:

 

[    0.344778] ERROR: could not get clock /amba_pl/gpio@41200000:s_axi_aclk(0)
[    0.350354] xilinx-gpio 41200000.gpio: Input clock not found
[    0.354733] xilinx-gpio: probe of 41200000.gpio failed with error -2


This looks like a logical error from a recent kernel patch (see my comment at the bottom) as the code flow changes for the case where the error equals -ENOENT:

https://github.com/Xilinx/linux-xlnx/commit/3bbc2fda8018d067910eac153c1f30caa509828a#diff-7ed822e465bd34f40d59c46889f9ba55L628

If I switch the logical or "||" at line 628 to a logical and "&&" and rebuild the kernel, the gpio driver loads but then:

2) My gpio-leds entries refuse to load.  It turns out this problem is the pl.dtsi generated by Petalinux which specifies

#gpio-cells = <3>;

while the documentation and all examples expect this value to be 2:

https://github.com/Xilinx/linux-xlnx/blob/3bbc2fda8018d067910eac153c1f30caa509828a/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt#L11-L14

...so I fixed up my gpio-leds entries to have 3 cells.  The gpio-leds driver now loads and appears to properly connect the LEDs I defined with the proper gpio pins, but the LEDs do not actually turn on, which leads to problem number:

3) I cannot change the value of the GPIO pins.  I have two banks of 4-bits specified for the axi_gpio block.  The first bank is input only and is tied to the push-button switches on the Zybo-Z7.  These work as expected, I can export the gpio, and the value reported via sysfs changes as I push the various switches.

However, while I can set the direction of the GPIO connected to the LEDs to out, I cannot change the value, it *ALWAYS* reports as 0 and the LED never illuminates:

root@zybo-z7:/sys/class/gpio# cat /sys/kernel/debug/gpio
gpiochip2: GPIOs 898-1015, parent: platform/e000a000.gpio, zynq_gpio:
 gpio-905 (                    |tally_led           ) out lo

gpiochip1: GPIOs 1016-1019, parent: platform/41200000.gpio, /amba_pl/gpio@41200000:
 gpio-1016 (                    |main_led            ) out lo
 gpio-1017 (                    |prvw_led            ) out lo
 gpio-1019 (                    |sysfs               ) out lo

gpiochip0: GPIOs 1020-1023, parent: platform/41200000.gpio, /amba_pl/gpio@41200000:
 gpio-1020 (                    |sysfs               ) in  lo
root@zybo-z7:/sys/class/gpio# cat gpio1019/direction
out
root@zybo-z7:/sys/class/gpio# cat gpio1019/value
0
root@zybo-z7:/sys/class/gpio# echo 1 > gpio1019/value
root@zybo-z7:/sys/class/gpio# cat gpio1019/value
0 


It is at this point I am giving up and asking for help.  Is there a simple "blink the LED via Linux" gpio demo application that is KNOWN to work on Petalinux 2018.1 and a Zynq-7000 you can point me to as a reference?

Do you have any idea why I cannot set the GPIO output value via sysfs?  What can make the GPIO value stay stuck at zero when it's configured as an output?

The LED attached to the PS side GPIO pin is working fine, the gpio-leds driver recognizes it and I can happily control it using the various available triggers.  This pin is "tally_led" in the gpio list, above.

I have attached the dtsi files from the Petalinux build in case you might be able to review them and spot anything I did wrong.

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Registered: ‎05-05-2018

Re: axi_gpio broken in Petalinux 2018.1?

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The problem is with the clocking.  The block-design containing the axi_gpio core is not the top-level of my design.  While the axi_gpio clock is being driven by the FCLK_CLK0 output from the Zynq PS, the signal leaves the block diagram (as FCLK_CLK0) and is routed back as M_AXI_GPIO_ACLK by the next layer up.  Apparently, this confuses the Vivado -> Export Hardware -> Petalinux workflow enough that no clocks node is created for the axi_gpio block (see the previously attached pl.dtsi file) which apparently causes the Xilinx GPIO driver to get very confused.

 

If I create an overlay in my system-user.dtsi file with an appropriate clocks node:

&axi_gpio_0 {
        clocks = <&clkc 15>;
};

...then everything is OK.  I can set output values, use gpio-leds, and otherwise use the gpio pins as expected.

 

I'm not really sure if this is an actual bug with the tools or not, but it's definitely annoying and it seems like something that ought to at least be documented.  If I missed the documentation for this, please point me to it, it likely contains a bunch of other details I should be aware of!

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Registered: ‎05-05-2018

Re: axi_gpio broken in Petalinux 2018.1?

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UPDATE:

I have a virtually identical design targeting the ZCU104 (Ultrascale+) design.

 

The only issue I see on the Ultrascale+ platform is #2 (the axi_gpio_0 node in pl.dtsi is also created with

#gpio-cells = <3>;

...which does not match the documentation.  But if the references in gpio-leds include a third cell (I just used 0 for the value) everything works as expected.  Linux sees the LEDs, and I can manually export unused LEDs and set the value as expected via sysfs entries, using exactly the same commands that fail on the Zynq-7000 (adjusting the GPIO value as needed for the platform).

 

It seems like something is broken on the Zynq-7000 platforms in 2018.1.

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Registered: ‎05-05-2018

Re: axi_gpio broken in Petalinux 2018.1?

Jump to solution

The problem is with the clocking.  The block-design containing the axi_gpio core is not the top-level of my design.  While the axi_gpio clock is being driven by the FCLK_CLK0 output from the Zynq PS, the signal leaves the block diagram (as FCLK_CLK0) and is routed back as M_AXI_GPIO_ACLK by the next layer up.  Apparently, this confuses the Vivado -> Export Hardware -> Petalinux workflow enough that no clocks node is created for the axi_gpio block (see the previously attached pl.dtsi file) which apparently causes the Xilinx GPIO driver to get very confused.

 

If I create an overlay in my system-user.dtsi file with an appropriate clocks node:

&axi_gpio_0 {
        clocks = <&clkc 15>;
};

...then everything is OK.  I can set output values, use gpio-leds, and otherwise use the gpio pins as expected.

 

I'm not really sure if this is an actual bug with the tools or not, but it's definitely annoying and it seems like something that ought to at least be documented.  If I missed the documentation for this, please point me to it, it likely contains a bunch of other details I should be aware of!

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