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Observer german010
Observer
2,938 Views
Registered: ‎09-10-2013

question about the stucture of the IOB in ug471 ?

the attachment is the figure in ug471 ,the page is 16

where is   DIFFI_IN  ,DIFFO_OUT, PADOUT,O_OUT connected?  DIFFI_IN  ,DIFFO_OUT are connected to another pad ?

and DCITERMDISABLE, IBUFDISABLE is used for control,  but  what is the usage of O_OUT , PADOUT ?

 

11.png
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2 Replies
Scholar austin
Scholar
2,922 Views
Registered: ‎02-27-2008

Re: question about the stucture of the IOB in ug471 ?

PAD is the square at top,

 

All other signals are internal, and are how the IOB is used by the device.  Those signals are routed nets in the design.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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Historian
Historian
2,920 Views
Registered: ‎01-23-2009

Re: question about the stucture of the IOB in ug471 ?

Many of these have to do with creating differential pairs using adjacent pairs of IOBs.

 

For example for a differential input, the DIFFI_IN of the master is connected to the PADOUT of the slave.

 

Similarly, for a differential output the DIFFO_OUT of the master is connected to the (I'm not sure - I think the PADOUT of the slave as well).

 

For the most part, you don't worry about these. Use the primitives you need from UG471 in the list in the section "7 Series FPGA SelectIO Primitives" (page 34). Each of these is documented showing which ports exist and what they do. For the ports that aren't listed in any of these, assume they are "internal" ports only, which the tool uses to create some of the more complex SelectIO Primitives. Besides, you can't actually instantiate the "IOB" (as shown in your image), so its ports are somewhat irrelevant to you... The diagram is just given so that you can have some idea as to what is actually going on "under the hood".

 

Avrum

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