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Visitor zongpeng
Visitor
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Registered: ‎05-27-2018

zynq7020's IO (as clk) output jitter

using ADC sample baseband that highest input frequence is 250Khz and use zynq7020 PL output sample clk that is 1.2288Mhz. I search all specs and not find any parament about jitter but "low jitter". I use vivado "get_property CONFIG.CLKOUT1_JITTER [get_ips clk_wiz_0]" and see the jitter is 157.069. I want to know how much  is zynq PL output max jitter when use MMCM/PLL, about all jitters, is it beyond 1ns? 

BR,

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