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DMA / Bridge Subsystem for PCI Express - Missing Blocks of data -

Posts: 1
Registered: ‎03-13-2018

DMA / Bridge Subsystem for PCI Express - Missing Blocks of data -

[ Edited ]

Using xc7vx690tffg1761-2, XDMA 2017.4_AR70325 (DMA / Bridge Subsystem for PCI Express), 4 lanes 5 GT/s max, AXI Stream 64 bits wide, 1 DMA channel each direction.

In this case the H2C AXIS is looped back through FIFOs (etc.) to the C2H AXIS.

Problem Description:
Linux Fedora 20 3.11.10-301.fc20.x86_64  : Driver for XDMA for Xilinx XDMA IP core


When using the dma_streaming_test.sh  with size of 4096, count of 1000 and 1 channel pair,  C2H DMA hangs and the computer needs to be restarted. The first 255 reads work but will not come back from the next read. Killing the process will not work as it is stuck in a loop in transfer_monitor_cyclic.


Changing lines 3459 and 3460


if(rc == 100){


to use its own variable instead of the result variable rc


int a_loop_count = 0;

if(a_loop_count == 100){


This stops the read from hanging but after comparing the final files there is still 255 blocks of 4096 bytes missing.


The correct number of transfers occurs at the AXIS.


PLEASE advise,


Thanks in advance!



PS may be related:



Posts: 2,485
Kudos: 290
Solutions: 219
Registered: ‎02-16-2010

Re: DMA / Bridge Subsystem for PCI Express - Missing Blocks of data -

Thanks for reporting the issue and how you have solved it. We will try to reproduce the issue and the resolution and get back.

Could you provide the .xci file of the XDMA IP you have used?
Don't forget to reply, give kudo and accept as solution