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DMA.Bridge sub system for PCI express - more then 1 bar

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Newbie
Posts: 1
Registered: ‎11-13-2017

DMA.Bridge sub system for PCI express - more then 1 bar

Hi,

I used the DMA bridge sub system to create PCI EP device.

The functional mode i use it as AXI bridge.

 

Now i created from this ip Example project,

which takes this ip and connect it to memory (Map AXI address to memory on FPGA)..

 

i did it with only 1 BAR and it worked fine...

 

Now lets say i'm doing same thing with 3 Bars,

How can i know from the AXI on which Bar i got hit? Where is this information is being coded?

 

 

 

 

Moderator
Posts: 687
Registered: ‎05-07-2015

Re: DMA.Bridge sub system for PCI express - more then 1 bar

[ Edited ]

HI @jonyc


I see that you are using US+ device and using DMA//bridge IP iin bridge mode.
when you enbale multiple BARs (for multiple peripherals) all you have to do is  simply build AXI interconnect  accordingly.( say1 master three slave interconnect)

 You need to  provide correct PCIE to AXI address translation value  for each BAR of corresponding AXI peripheral.
if the input MemWr request hits BAR1, the corresponding AXI address of peripheral_1 will be written into.
for details on how to mention address translation parameter, please go through the following AR. 

https://www.xilinx.com/Attachment/Xilinx_Answer_65062_AXI_PCIe_Address_Mapping.pdf

 

 

 

Thanks
Bharath
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AXI_bridge_config_GUI.JPG