UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor pkuna
Visitor
2,231 Views
Registered: ‎03-12-2017

DMA Subsystem Descriptor Bypass questions

Xilinx community,

 

I am new to working with DMAs and have some questions about operating the DMA subsystem in descriptor bypass mode. I built a project that uses the DMA/bridge subsystem for PCI express and custom logic that loads the C2H descriptor bypass port when a data source on the FPGA has data to send to the CPU memory. I am using an ILA to monitor the AXI bus and all other signals of interest. When I enable the FPGA to start transferring data all of the signals on the ILA look correct.  Data is being transferred over the AXI bus from the address specified by the source address descriptor. But.... I have no idea where the data is going. Which leads to my questions.

 

1. How is the destination address descriptor mapped back to the CPU memory? What do I need to do on the Linux side to access the data that was transferred? Does the xdma driver need to be modified to work with descriptor bypass mode?

 

2. I am only interested in C2H transfers. Do both the C2H and H2C descriptor bypass ports need to be enabled for descriptor bypass mode to work as is done in the example project?

 

3. My project involves transferring real-time data from multiple data sources from the FPGA to the CPU memory. Is descriptor bypass mode the fastest way to transfer data from the FPGA to CPU memory? Another option would be to have the FPGA set an interrupt when a data source has data to send then have the CPU initiate the data transfer. I would like to hear some opinions on this.

 

I am using Vivado 2017.2, DMA/Bridge subsystem for PCI express version 3.1 and the xdma driver provided by Xilinx in the AR65444 answer. I did build the example projects not using descriptor bypass in PG195 and successfully used the "dma_to_device" and dma_from_device" scripts. The "dma_from_device" script did not work with descriptor bypass mode which I expected. I also built the descriptor bypass example and it seemed to work i.e. the "channel completed descriptor count" incremented but I could not access the data.

 

Thanks for your help.

 

Paul

0 Kudos
1 Reply
Adventurer
Adventurer
1,437 Views
Registered: ‎11-24-2017

Re: DMA Subsystem Descriptor Bypass questions

Hello @pkuna,

 

I have quite similar needs like you. I'm using DMA subsystem for PCIe, and I only need C2H transfer. I also need descriptor bypass but unlike you, I'm using AXI4-Stream interface insteaad of AXI-Memory Mapped.

 

Were you able to resolve your problem? Are you willing to share your project and custom logic with me? That would be a great starting point for me!

 

Thanks in advance for your time and effort.

 

Sincerely,

Bojan.

0 Kudos