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Data Transfer from Linux to AXI Memory Mapped to PCIe

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Visitor
Posts: 19
Registered: ‎03-12-2017
Accepted Solution

Data Transfer from Linux to AXI Memory Mapped to PCIe

Hi,

I am using AXI Memory Mapped to PCie IP in my design. I have created a AXI Slave Custom IP and connected it with AXI Master of PCIe IP. The Connection is done my using AXI Interconnect IP. On the other end of PCIe, I am using Linux OS. I wrote a drive and initialized the PCIe bar and send data from Linux Kernel Driver to FPGA Custom IP.

The thing is that, when I send data to a BAR with 0x00 offset, i see that data received successfully at FPGA side and also the read back is working.

But when I send data to a BAR with 0x01 offset, I can see that AXI shows and run successfully but in data, i receive all zeros in FPGA. 

For all ODD offsets everything is working fine but all zeros in the data (FPGA side).

For all EVEN offsets everything is working fine and receive data have the valid values (FPGA side). as shown in below diagram. I don't know why this is happening. Am I doing something wrong in Linux or what?

Also how the offset translation works from Linux to FPGA i.e. 0 maps to 0, 1 maps to 4, 2 maps to 8 and so on.

 

Linux Code sample:

unsigned long bar_start; 
unsigned long bar_end; 
unsigned long bar_length;

bar_start  = pci_resource_start(pdev, 0);
bar_end    = pci_resource_end(pdev, 0);
bar_length = bar_end - bar_start;

BarAddress_PHYS = bar_start;
BarAddress_VIRT = ioremap_nocache(BarAddress_PHYS,bar_length);

__raw_writel(0x0000BEEF, BarAddress_VIRT + 0x0);
__raw_writel(0x0001BEEF, BarAddress_VIRT + 0x1);
__raw_writel(0x0002BEEF, BarAddress_VIRT + 0x2);
__raw_writel(0x0003BEEF, BarAddress_VIRT + 0x3);
__raw_writel(0x0004BEEF, BarAddress_VIRT + 0x4);
so on

 

 

 

Drawing1.jpg

Accepted Solutions
Visitor
Posts: 19
Registered: ‎03-12-2017

Re: Data Transfer from Linux to AXI Memory Mapped to PCIe

It was my mistake, Data Is coming but it was on the MSB 32 bits of AXI WDATA.
ODD offset data is at MSB 32 bits of AXI WDATA.
EVEN offset data is at LSP 32 bits of AXI WDATA.
Issue Resolved

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All Replies
Visitor
Posts: 19
Registered: ‎03-12-2017

Re: Data Transfer from Linux to AXI Memory Mapped to PCIe

It was my mistake, Data Is coming but it was on the MSB 32 bits of AXI WDATA.
ODD offset data is at MSB 32 bits of AXI WDATA.
EVEN offset data is at LSP 32 bits of AXI WDATA.
Issue Resolved
Visitor
Posts: 19
Registered: ‎03-12-2017

Re: Data Transfer from Linux to AXI Memory Mapped to PCIe

Sorry the issue still exist. I was confused about data.