09-12-2018 10:27 AM
I've been trying to evaluate the XDMA IP and put together a simple Block Design with the XDMA IP in it and built it successfully for my board. I see my board under the Device Manager as "PCI Serial Port". I downloaded the xdma_driver_win_2018_2.zip file from the XDMA lounge and tried installing the driver but it crashes the machine and causes a reboot before completing the driver installation. Is it possible that I might have selected different options in my Vivado 2018.2 project that are not compatible with the driver available on the lounge? Is there a link to download the Vivado project that was used with the driver source?
09-12-2018 10:36 AM
What is the configuration of the motherboard?
Do you get Blue screen error when the machine crashes? If it is, can you try to get a crash report?
When loading the crash dump (C:\Windows\MEMORY.DMP) via WinDbg you will need to set the “Symbol File Path” and “Source File Path” to the XDMA windows driver binary folder and source folders respectively.
Once you have set these paths then the backtrace will show the actual functions called in the XDMA driver and even the source can be browsed to investigate variable values at that time.
09-12-2018 11:50 AM
Thank you for the quick reply!
I am unfortunately remote desktop-ing into this machine right now, so when the driver install fails, the connection is cut off, and the machine reboots, and I'm able to login to it again. I did check and there is a C:\WINDOWS\MEMORY.DMP file with the right time of generation to correspond to the crash.
Can you please tell me which directories exactly for running WinDbg? I have attached a screen capture of the Windows Explorer directory tree underneath the root "xdma_driver_win_2018_2" directory. I have been attempting to use the following directory to install the driver in Device Manager:
I also tried running the XDMADriverInstaller.msi installer under the following directory, but had a similar crash and reboot with a MEMORY.DMP generated as well.
09-12-2018 12:28 PM
I attempted the driver update with the Win10_Debug directory selected and had a similar crash and reboot.
I searched around online a bit and saw I could set my symbol file path to: http://msdl.microsoft.com/download/symbols
I then loaded the MEMORY.DMP file and clicked on the "!analyze -v" hyperlink that resulted in WinDbg and I saw what looked to be some meaningful debugger output. I have attached the resulting WinDbg output.
09-13-2018 08:15 AM
This backtrace does not show any calls to XDMA driver functions. Instead, it seems that the crash is originating from an “intelppm” driver.
09-17-2018 01:52 PM
My original block design in Vivado had a few other IP in it. I removed as many of these IP as possible and built the simple design in the attached figures (sc5.png and sc6.png). The driver then installed properly from the directory:
using the Device Manager/Update Driver/Browse for driver approach.
I then ran "simple_dma.exe" and saw transfer rates that seemed reasonable. I have since added back in some IP like a block ram on the same AXI bus as the DDR4 (sc7.png and sc8.png), but when I run simple_dma now, I get an error message on the Host to Card transfer, but no error message on the Card to Host transfer. However, for both transfers, the completion time is impossibly fast for an 8MB transfer.
I am wondering if I have my AXI addresses set incorrectly in my block design. How does the driver know that the DDR4 has an offset of 4GB for example? I see in the following YouTube video (around time 13:05) that the Linux code allows you to specify an offset for the transfer in the dma_memory_mapped_test.sh script. How do you specify such an offset under Windows?
09-17-2018 04:07 PM
09-18-2018 12:52 PM
I have not yet isolated the exact cause of the crash in my original block design, but I have reverted to the much simpler block design shown in my previous post and there are no driver issues. As I add back in the IP from the original design, I will hopefully discover the issue, and I will post when/if this happens. I will start a separate post with the question about how to set the block design addresses correctly to operate with the driver. Thanks for your help!