09-13-2018 04:09 AM - edited 09-13-2018 07:50 AM
I am working with the XDMA example that uses only the PCIe hard IP core and we are having issues getting the card to enumerate on Gen 6 Intel CPUs. The card will however enumerate on some Intel Gen 7 CPUs (Core I7-700P) intermittently.
When we tried the new factory flash (rdf0317-kcu105-restoring-flash-c-2017-3.zip), then the card works fine to enumerate on the Gen 6 CPU systems.
What we have noticed is that our design is bases on the XMDA PCIe hard IP core example design. We reconstructed the example listed above that works and it is based what looks like a soft IP core on top of the hard IP core. Is the hard core disabled and replaced with soft core?
Does the hard IP core have issues such as a timing problem and the reason for Xilinx to use the soft IP core?
We are definitely seeing the issue with the hard IP core untouched example source.
We need to know why the hard IP core example does not work on some Intel based systems while the soft IP core based examples work fine.
1) Is there a known issue with the hard PCIe IP core or example sources, and what is the issue?
2) Why does the latest factory flash load have a soft PCIe IP core, was that added to replace hard IP core?
3) If there is known problem, can our existing design easily be ported to new soft IP core and is there a cost increase?
4) Is there more detailed information on the problems we are having?
09-13-2018 09:12 AM
As another engineer on the project, I wanted to add some information.
The XDMA example code was generated in Vivado 2017.4 by selecting the XDMA IP and creating the example project for the KCU105 board. We have our own custom logic derived from the same design that exhibits the same behavior, enumerating on the 7700 core but not on the 6700 core.
Using the example files from KCU105 TRD02 (rdf0306-kcu105-trd02-2017-3.zip from https://www.xilinx.com/support/documentation-navigation/design-hubs/dh0043-kcu105-evaluation-kit-hub.html) produces a version that enumerates on both the 6700 and 7700 cores.
09-17-2018 04:52 PM
09-18-2018 11:00 AM
We tried updating to 2018.2 which did not resolve the issue.
I have also been informed that Dell released a BIOS update for some of their computers to address issues with this car/IP combination, but that update was not released for the Dell computers we are using.
10-04-2018 09:47 AM - edited 10-04-2018 10:22 AM
Here is a wild suggestion. I have heard of some (older) PCs that have a "special" PCIe slot designated for the graphics card. Can you try a different slot in the same Gen 6 PC?
I can tell you that I have built all kinds of FPGA designs with PCIe interfaces and have never found a machine that would not enumerate.
In any case, your problem is very curious. Please post when you find the solution.