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Newbie sky2free
Newbie
2,283 Views
Registered: ‎04-26-2017

PCIe PHY IP for Kintex UltraScale xcku095-ffva1156-2-e

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Hi

 

I am using vivado 2016.4 and UltraScale xcku095-ffva1156-2-e

 

However, vivado 2016.4(2017.1) does not support PCIe PHY IP for UltraScale xcku095-ffva1156-2-e

 

How can I use or make PCIe PHY IP for  UltraScale xcku095-ffva1156-2-e

 

I searched the site for this and found no specific answer.

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Teacher muzaffer
Teacher
4,137 Views
Registered: ‎03-31-2012

Re: PCIe PHY IP for Kintex UltraScale xcku095-ffva1156-2-e

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@sky2free I am assuming this is for an asic prototype. You are right that it seems PIPE is not exported from this block so it is not possible to connect the Synopsys controller to it. There maybe an undocumented way to access to PIPE but you need to check with Xilinx for that.

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Teacher muzaffer
Teacher
2,269 Views
Registered: ‎03-31-2012

Re: PCIe PHY IP for Kintex UltraScale xcku095-ffva1156-2-e

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@sky2free 

when you say:

"However, vivado 2016.4(2017.1) does not support PCIe PHY IP for UltraScale xcku095-ffva1156-2-e"

 

what exactly do you mean, or how do you reach this conclusion? Are you getting an error somewhere? This chip has 4 pcie controllers and it should definitely support using them.

Have you looked at this document: https://www.xilinx.com/support/documentation/ip_documentation/pcie3_ultrascale/v3_0/pg156-ultrascale-pcie-gen3.pdf

 

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Newbie sky2free
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2,256 Views
Registered: ‎04-26-2017

Re: PCIe PHY IP for Kintex UltraScale xcku095-ffva1156-2-e

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Thank you for your reply.

 

I want to use only the PCIe PHY IP of the vivado pcie list.

( I would like to use Sysnopsys Controller for PCIe Controller and Xilinix PHY IP for PHY.)

 

However, PCIe PHY IP does not support the xcku095-ffva1156-2-e device.

 

So I asked about how to use PCIe PHY IP on the xcku095-ffva1156-2-e device.

 

I've already read the linked document.

 

I am sorry if my explanation was inappropriate.

vivado_pcie_phy.jpg
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Teacher muzaffer
Teacher
4,138 Views
Registered: ‎03-31-2012

Re: PCIe PHY IP for Kintex UltraScale xcku095-ffva1156-2-e

Jump to solution

@sky2free I am assuming this is for an asic prototype. You are right that it seems PIPE is not exported from this block so it is not possible to connect the Synopsys controller to it. There maybe an undocumented way to access to PIPE but you need to check with Xilinx for that.

- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.
0 Kudos