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Visitor athulya
Visitor
359 Views
Registered: ‎08-13-2019

PCIe XCZU4CG

i use an XCZU4CG Ultrascale+ board for PCIe . I use the Xilinx Drivers and run the example script run_test.sh. But i get error " writefile : unknown error 512" and H2C status shows busy.

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11 Replies
Moderator
Moderator
322 Views
Registered: ‎01-15-2008

Re: PCIe XCZU4CG

which PCIe you have configured? is it PS-PCIE or PL-PCIE? 

the drivers/example design in AR65444 is for PL-PCIe

could you provide the complete report of the error message you see

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Visitor athulya
Visitor
304 Views
Registered: ‎08-13-2019

Re: PCIe XCZU4CG

Im using PL-pcie.

The run_test logs -kernel and user side are attached below.

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Moderator
Moderator
295 Views
Registered: ‎01-15-2008

Re: PCIe XCZU4CG

check the following thread and see if the suggestions helps in your case which is same error message

 

https://forums.xilinx.com/t5/PCI-Express/debug-the-driver-of-IP-PCIE-with-DMA/m-p/914480#M12599

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Visitor athulya
Visitor
267 Views
Registered: ‎08-13-2019

Re: PCIe XCZU4CG

Tried rebooting after running the test run_test.sh. I tried with transfer size 256,1024 . Tried with address offset 0 and 2147483648. Same error occurs.

Tried Wojtechs driver(v2_xdma) -make command itself generated lot of errors.

The link given in pdf AR65444 points to an old version of Xilinx driver.The link to github seen shows updated version of both Xilinx_files(org.driver) and Xilinx_rel2018(new driver).

I tried old Xilinx file(github -which had some updates) and using the./dma from device and ./dma to device on command line works.But when running run_test.sh, it starts the first transfer and in dmesg outputs till h2c engine starts running.After that ,there is no output(on both side-kernel and user).I observe that the interrupts are not getting serviced and i think thats why the next transfer doesnt start and dma gets stuck there.

set_property -dict [list CONFIG.soft_reset_en {true} [get_ips ] . i didnt understand this.Where is this to be set?

I have attached the ./dma from device and dma to device log. The run_test output is also attached.

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Visitor athulya
Visitor
252 Views
Registered: ‎08-13-2019

Re: PCIe XCZU4CG

When i try using AXI-Lite Interface,i get the error:Segmentation fault(core dumped).The AXI-Lite is at offset 0x44A00000as per my design.

 

athulya@athulya:~/ATHULYA/XilinxAR65444-master/Linux/Xilinx_Answer_65444_Linux_Files/tests$ ./reg_rw /dev/xdma0_user 0x44A00000 w 0x12345678
argc = 5
device: /dev/xdma0_user
address: 0x44a00000
access type: write
access width given.
access width: word (32-bits)
character device /dev/xdma0_user opened.
Memory mapped at address 0x7f89b6caa000.
Write 32-bits value 0x12345678 to 0x44a00000 (0x0x7f89fb6aa000)
Segmentation fault (core dumped)

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Observer benu
Observer
226 Views
Registered: ‎06-09-2014

Re: PCIe XCZU4CG

Open reg_rw.c and edit the #define MAP_SIZE to map a larger space, your AXI_L IP is outside of the mapped range

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Visitor athulya
Visitor
156 Views
Registered: ‎08-13-2019

Re: PCIe XCZU4CG

I edited the MAP_SIZE to 4K in reg_rw.c and offset which was earlier 0x44A00000 is set to 0x0000 in Axi lite interface and now works. Dma_to_device which was getting stuck now gives successful write after resetting the count to a small value which was initially a very high value.Now H2C works but C2H does not work.

Also, at a time only one interface works. That is, if i am using ./reg_rw/xdma0_user(Axi lite) for write and read-which works,then the dma(MM interface) wont work and vice versa. Please suggest!!

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Visitor athulya
Visitor
117 Views
Registered: ‎08-13-2019

Re: PCIe XCZU4CG

Dma write works. But only for 10bytes transfersize. Dma gets stuck on Higher value of transfer size like 100,1024 etc.Dma read doesnt work. Interrupt not getting serviced. In ILA,when read command is executed,i get arvalid=1.No transfer after then.What could be the reason?

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Observer benu
Observer
99 Views
Registered: ‎06-09-2014

Re: PCIe XCZU4CG

Are you using MSI-x interrupts? If not, i think you have to go into load_driver.sh and change the default to "use MSI"

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Visitor athulya
Visitor
85 Views
Registered: ‎08-13-2019

Re: PCIe XCZU4CG

In load_driver.sh, There is no such line specifying to use MSI. Can you specify where i should use?

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Observer benu
Observer
65 Views
Registered: ‎06-09-2014

Re: PCIe XCZU4CG

Yeah they didn't really make it clear how to use it.

 

You see the line where you can comment out and specify "poll mode" vs "interrupt mode"?

insmod ../xdma/xdma.ko poll_mode=1

These are kernel module parameters, specified in libxdma.c

if you open it you will see one for "interrupt_mode"

So for mine, i've set:

insmod ../xdma/xdma.ko interrupt_mode=1

To specify I'm using MSI and not MSI-x or legacy interrupts. I don't know why but the driver seemed to check for MSI-x interrupts and if the capability wasn't found it would default back to legacy.

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