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Participant quenii
Participant
4,504 Views
Registered: ‎12-14-2008

Pcie training got GEN1, but can be GEN2 when soft reset

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I've made a pcie board with 7k325t.

when power on the PC, the pcie training succeed, but only got GEN1 link speed.

if I push reset button of my PC while post(BIOS stage), it can be linked to GEN2.

 

What's the difference and how to solve such problem?

 

 

ps, prom I'm using is 28f512.

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Participant quenii
Participant
6,028 Views
Registered: ‎12-14-2008

Re: Pcie training got GEN1, but can be GEN2 when soft reset

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Problem solved. Caused by low config speed.
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2 Replies
Xilinx Employee
Xilinx Employee
4,445 Views
Registered: ‎11-25-2015

Re: Pcie training got GEN1, but can be GEN2 when soft reset

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Hi Quenil,

 

It seems like you have issue with the clocks.Please check your design whether it meets timing

 

When you do soft reset,software will reprogram the Clocks 

 

Regardless of their state, the clock dividers will be properly set following reset.

 

Once the clock is clean,PLL and Clock lock is acheived so which makes reset and initilization sequences smooth to acheive the link up and speed negotiation to happen for Max Speed 

 

Before applying soft reset check whether it tried negotiating to Gen2 speed and down configured to Gen1 or not?

 

This will answer the question and we can understand whether the BER and Clocks(not clean) play a role here

 

Thanks,

Sethu

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Participant quenii
Participant
6,029 Views
Registered: ‎12-14-2008

Re: Pcie training got GEN1, but can be GEN2 when soft reset

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Problem solved. Caused by low config speed.
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