08-15-2016 04:18 PM
I've made a pcie board with 7k325t.
when power on the PC, the pcie training succeed, but only got GEN1 link speed.
if I push reset button of my PC while post(BIOS stage), it can be linked to GEN2.
What's the difference and how to solve such problem?
ps, prom I'm using is 28f512.
08-17-2016 12:21 PM
It seems like you have issue with the clocks.Please check your design whether it meets timing
When you do soft reset,software will reprogram the Clocks
Regardless of their state, the clock dividers will be properly set following reset.
Once the clock is clean,PLL and Clock lock is acheived so which makes reset and initilization sequences smooth to acheive the link up and speed negotiation to happen for Max Speed
Before applying soft reset check whether it tried negotiating to Gen2 speed and down configured to Gen1 or not?
This will answer the question and we can understand whether the BER and Clocks(not clean) play a role here