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Observer chili.chips
Observer
9,584 Views
Registered: ‎09-01-2014

V7 PCIE Gen3 core (pcie3_7x_0_pcie_3_0_7vx) RQ TREADY goes permanently low

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I'm trying to get some DMA uploads going through the pcie3_7x_0_pcie_3_0_7vx core in Gen3 x8 End Point mode (256bit @250MHz AXI-S).

 

RQ interface is configured for Address-Aligned mode and max payload size is 1024 bytes.

 

Having accepted a few packets with dword_count=256, the PCIE core brings its TREADY output down and leaves it there for the rest of the day. It seems as if those packets it took in have never gone out, hence its FIFO filled up and TREADY remained stuck at 0.

 

I inspected the contents of RQ descriptors sent to the core and they all looked OK and per PG023 Fig.3-46.

 

Any hints as to the possible reasons for RQ TREADY to go low and stay so only a few packets into tranmission?

 Any config, side-base USER bus signal or descriptor field that could precipitate such behavior?

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Explorer
Explorer
16,974 Views
Registered: ‎12-01-2010

Re: V7 PCIE Gen3 core (pcie3_7x_0_pcie_3_0_7vx) RQ TREADY goes permanently low

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Hello,

   I've seen this behavior before, and it is most likely due to not having enough available credits from the Root Port, causing a permanent "Transmission Stall."  See my post about this issue:

Throughput issues with DMA and tx_buf_av in 7 Series Integrated PCIe Block

 

I'd reccomend pulling out your buffer available signals, and see what that looks like.  It's most likely at some low number, after the packets stop being sent.

 

Essentially, what is happenning is that your packets are getting stuck in an upstream switch, because the switch doesn't support payloads of that size. The core maximum is 1024 bytes (256 DWs), settable in the GUI.  My system, however,  negotiates to a payload size of 256 bytes (64 DWs) as a maximum. 

 

Try decreasing your payload size, and your problem will most likely go away.

 

 

 

 

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Explorer
Explorer
16,975 Views
Registered: ‎12-01-2010

Re: V7 PCIE Gen3 core (pcie3_7x_0_pcie_3_0_7vx) RQ TREADY goes permanently low

Jump to solution

Hello,

   I've seen this behavior before, and it is most likely due to not having enough available credits from the Root Port, causing a permanent "Transmission Stall."  See my post about this issue:

Throughput issues with DMA and tx_buf_av in 7 Series Integrated PCIe Block

 

I'd reccomend pulling out your buffer available signals, and see what that looks like.  It's most likely at some low number, after the packets stop being sent.

 

Essentially, what is happenning is that your packets are getting stuck in an upstream switch, because the switch doesn't support payloads of that size. The core maximum is 1024 bytes (256 DWs), settable in the GUI.  My system, however,  negotiates to a payload size of 256 bytes (64 DWs) as a maximum. 

 

Try decreasing your payload size, and your problem will most likely go away.

 

 

 

 

Observer chili.chips
Observer
9,385 Views
Registered: ‎09-01-2014

Re: V7 PCIE Gen3 core (pcie3_7x_0_pcie_3_0_7vx) RQ TREADY goes permanently low

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yes indeed, that exactly was the root cause of this (now ancient) problem

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