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Observer josecm
Observer
938 Views

Workflow for pcie device/driver development

Hello, I am currently starting a project on the development of a pcie device and respective driver using a vcu1525 board.  I'll be using the DMA PCIe IP and the accompanying drivers (windows 10), and possibly slightly modifying the latter or adding an upper filter driver. I'd like to know your opinion on the best workflow for this development as I foresee I'll be writing the logic and the software in tandem. My main doubt is if I will be able to reprogram the fpga while it is attached to the running target/test computer without any problems...

 

Thank you in advance

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7 Replies
Xilinx Employee
Xilinx Employee
856 Views

Re: Workflow for pcie device/driver development

the easifest way to start the project is to modify the xdma example design and driver file

By default settings, you will be able to run the xdma Demo with example driver code.

 

Tandem have limitations on the PCIE locations, you can also generate  the example design with tandem options on

the example will include the constraints to draw pblocks and setting bitstreams steges

If you need to add your user logics, make sure  they are in stage 2.

 

the xdma logic is in stage 2 by default so if you are reprogram the Stage2, if this is the case,the XDMA will not work

 

 

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844 Views

Re: Workflow for pcie device/driver development

Hi josecm,

 

As an alternative to the Xilinx driver, you can try WinDriver the Driver Developing Toolkit, it has an XDMA sample at C:\WinDriver12.7\xilinx\xdma . During the 30 days evaluation, you will be entitled to full support from our support engineers.

 

You can download WinDriver at our website http://www.jungo.com/st/contact-form/?product=WinDriver or send me an email for a direct link and more information.

 

Best regards, 
Evgeny Moss
Account Manager 
Jungo Connectivity Ltd 
P:+1 408-600-0851 
evgenym@jungo.com
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Observer josecm
Observer
819 Views

Re: Workflow for pcie device/driver development

Thank you for your suggestions guys... But none of you has actually replied to my question. My main question is if I will be able to reprogram the device while it is attached to the powered on target PC...

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Observer josecm
Observer
780 Views

Re: Workflow for pcie device/driver development

I've found this guide https://www.xilinx.com/html_docs/xilinx2017_4/sdaccel_doc/xdw1504034340451.html on how to install the board on a host computer and program the device. When it talks about programming the device it mentions "reboot the host computer" after the device is programmed. So, can I assume it is safe to reprogram the device while attached to a turned on host computer?

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Observer josecm
Observer
657 Views

Re: Workflow for pcie device/driver development

A small update... I've actually started using the setup. Vivado only detects the board in the hardware manager, when the computer hosting the board is actually on. The problem is when I reprogram the board, Windows crashes with a fatal PCIe error (even when I deactivate the device in the device manager). When windows reboots it seems to be all okay: the driver detects the device, and my design seems to be working fine. However, this is not ideal, as I must cause this fatal error to reprogram the device. Any workarounds? I must be doing something wrong.

 

Also, when I completely unpower the computer, the next time I boot it the design is not there anymore. What can I do to save it in the flash memory and automatically reprogram the bitstream once power is up?

 

Thank you in advance

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Observer josecm
Observer
544 Views

Re: Workflow for pcie device/driver development

Please, no one has a solution to my problem? I really need a way to reprogram the board without crashing the windows system...
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Moderator
Moderator
537 Views

Re: Workflow for pcie device/driver development

There is a new version (for Vivado 2018.2) of windows driver available with AR#65444. Can you try with that?

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