UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor kseth_xilinx
Visitor
302 Views
Registered: ‎09-30-2018

Xilinx PCIe PHY simulation in VCS

Hi,

 

I am trying to bring up Xilinx PCIe Phy in a VCS simulation environment. I have included all relevant files and able to compile successfully but while running sims it seems because of protected/secure modules VCS is not dumping me any log or waves. On ucli run I see below message -

 

Warning-[UCLI-ACTIVE-SCOPE-INVISIBLE] UCLI active scope invisible

  The active scope where simulation stops in is invisible, i.e. the module of

  the active scope is fully encrypted, or one of its parent modules is

  encrypted. Moving up to its parent modules until it is visible. If its top

  module is still invisible, moving to next visible top module.

 

Is there any special parameter/define/vcs_switch I need to provide to get it going?

 

Thanks

0 Kudos
1 Reply
Moderator
Moderator
258 Views
Registered: ‎02-16-2010

Re: Xilinx PCIe PHY simulation in VCS

Are you trying the simulation using scripts?

Can you please share the .xci file of the IP?
------------------------------------------------------------------------------
Don't forget to reply, give kudo and accept as solution
------------------------------------------------------------------------------
0 Kudos