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pcie_7x vs xdma

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Explorer
Posts: 106
Registered: ‎03-03-2011
Accepted Solution

pcie_7x vs xdma

I'm looking to implement a PCIe to Ethernet design. Using 2016.4 I can see there are a couple of IP modules that look useful:

 

7 Series Integrated Block for PCI Express (pcie_7x)

&

DMA/Bridge Subsystem for PCI Express (xdma)

 

The AXI Memory Mapped to PCI Express (axi_pcie) IP i'm ignoring as I don't want memory mapped.

 

I can configure the xdma to provide AXI-Streaming interfaces on the user side which I believe is what I want which then looks like the pcie_7x so I was wondering why these two IP exist? Is it that xdma is one IP that is configurable so that it can be either AXI-Stream or memory mapped and it will eventually replace the other two IP?


Accepted Solutions
Xilinx Employee
Posts: 30
Registered: ‎12-10-2013

Re: pcie_7x vs xdma

Hi!

 

The 3 different available IPs provide 3 very different subsets of capabilities - especially considering not everyone wants a full DMA engine.

 

The 7-series Integrated Block is really the base block.  This is the "smallest" (i.e. least resources) and most flexible of the 3.  The core provides the translation of PCIe to AXI-S (stream), and leaves the majority of the development to the user.  This means the user can design to their application.  It can be used as a simple PIO or applied to many other applications.  

 

The AXI Bridge for PCIe has most logic created for the user - by taking the 7-series Integrated Block and adding on a Memory Mapped bridge - essentially taking the stream interface, and adding on the Memory mapping capability.  From a resource perspective, this is the middle of the 3, and provides a lot more functionality to the user.  However, the user still has control of the back-end application and often don't use DMA as the source engine.   There is less flexibility for the user, but a lot more "already done".

 

The DMA engine is the newest of the 3, and takes the 7-series Integrated block and adds a full DMA engine to the end.  This provides a huge amount of functionality, and is thusly the heaviest on resource utilization.   It does have both Memory Mapped and Stream interfaces, but is definitely designed as a DMA engine - so the expectation is that through descriptors the engine is pushing / pulling data from the upstream device.  For some applications this is the perfect fit, but for many others the Endpoint led data model doesn't fit within the application.

 

These will remain separate cores do to the wide variety of applications we support.  There are also options for the Integrated Block and AXI MM cores to be Root Port, where DMA is an endpoint. 

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All Replies
Xilinx Employee
Posts: 30
Registered: ‎12-10-2013

Re: pcie_7x vs xdma

Hi!

 

The 3 different available IPs provide 3 very different subsets of capabilities - especially considering not everyone wants a full DMA engine.

 

The 7-series Integrated Block is really the base block.  This is the "smallest" (i.e. least resources) and most flexible of the 3.  The core provides the translation of PCIe to AXI-S (stream), and leaves the majority of the development to the user.  This means the user can design to their application.  It can be used as a simple PIO or applied to many other applications.  

 

The AXI Bridge for PCIe has most logic created for the user - by taking the 7-series Integrated Block and adding on a Memory Mapped bridge - essentially taking the stream interface, and adding on the Memory mapping capability.  From a resource perspective, this is the middle of the 3, and provides a lot more functionality to the user.  However, the user still has control of the back-end application and often don't use DMA as the source engine.   There is less flexibility for the user, but a lot more "already done".

 

The DMA engine is the newest of the 3, and takes the 7-series Integrated block and adds a full DMA engine to the end.  This provides a huge amount of functionality, and is thusly the heaviest on resource utilization.   It does have both Memory Mapped and Stream interfaces, but is definitely designed as a DMA engine - so the expectation is that through descriptors the engine is pushing / pulling data from the upstream device.  For some applications this is the perfect fit, but for many others the Endpoint led data model doesn't fit within the application.

 

These will remain separate cores do to the wide variety of applications we support.  There are also options for the Integrated Block and AXI MM cores to be Root Port, where DMA is an endpoint. 

Explorer
Posts: 106
Registered: ‎03-03-2011

Re: pcie_7x vs xdma

Hi @bethe,

 

Thanks for the detailed reply. Our application is based around a PCIe to Ethernet (RGMII). Which IP would you suggest is the best fit for this type of application? I've assumed a AXI-streaming interface would be most applicable so i'm currently looking at the XDMA IP in streaming mode.

Adventurer
Posts: 89
Registered: ‎09-22-2016

Re: pcie_7x vs xdma

If you are just streaming out packets then perhaps the 7 Series is the most indicated. 

You can take the AXI Stream interface on both sides and code packets out with HLS for example.