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pedro_uno
Advisor
Advisor
7,550 Views
Registered: ‎02-12-2013

AXI Master via PCI Express

Hello,

 

I have had good results the Zynq Processing System to control AXI peripherals under Vivado.  The IP Integrator makes it pretty easy to connect things.

 

Now I need to build a bigger system with a faster processor and more logic but I would like to continue to use the IP Integrator to connect things.  In this new system we plan to use an external processor connected to the Kintex-7 FPGA via PCI Express.  I am hoping there is a more or less standard way to use a PCI Express endpoint to act as the master of the AXI bus in the FPGA.

 

I have started by experimenting with an IP Catalog block called "AXI Memory Mapped To PCI Express".  It seems to be the correct block to use but the datasheet (PG055) doesn't answer all my questions.  I have to make a lot guesses to connect it to the AXI Interconnect block and the rest of my system.  Also, I found reference design AR56690 but it is out of date and does not compile under Vivado 2014.2.

 

Can anyone suggest a good example design or tutorial that covers the subject of using a PCI Express endpoint as the AXI bus master?

 

Thanks for any advice.

 

  Pete

 

 

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DSP in hardware and software
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trenz-al
Scholar
Scholar
7,495 Views
Registered: ‎11-09-2013

this AR targets a pre-historic vivado version, you should not attempt that old design direclty in 2014.2

 

I have not done memory mapped device, yet but I have done

 

PCIe root for zynq

PCIe device (without memory mapped)

 

with vivado 2014.2 and everything just worked.

everything done with vivado wizards and auto configs, not a line custome code written.

 

Just try it should work, but do not try some acient stuff, takes only little mouseclicking to get it done in vivado from scratch

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