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Registered: ‎05-16-2018

Address of QDMA WriteBack Status

Hi all,

 I noticed the address of QDMA WriteBack is always hard code as 'hxx_x1e0 on QDMA example project.
 As following source code under "usp_pci_exp_usrapp_tx.v".

task TSK_QDMA_MM_TEST;
....

//-------------- Start DMA tranfer ------------------------------------------------------ $display(" **** Start AXI-MM H2C transfer ***\n"); fork //-------------- Writ PIDX to 1 to transfer 1 descriptor ---------------- //write address wr_add = QUEUE_PTR_PF_ADDR + (axi_mm_q* 16) + 4; // 32'h00006404 board.RP.tx_usrapp.TSK_XDMA_REG_WRITE(wr_add[31:0], 32'h1, 4'hF); // Write 1 PIDX //-------------- compare H2C data ------------------------------------------------------- $display("------Compare H2C AXI-MM Data--------\n"); board.RP.tx_usrapp.COMPARE_DATA_H2C({16'h0,board.RP.tx_usrapp.DMA_BYTE_CNT},768); //input payload bytes join board.RP.tx_usrapp.COMPARE_TRANS_STATUS(32'h000011E0, 16'h1);
...

Is there a rule to describe this address? I can't find the rule for this address in the user guide "pg302-qdma.pdf".
Would you mind helping me?

 

Thanks.

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