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peterlo8
Observer
Observer
510 Views
Registered: ‎11-21-2018

An interesting phenomenon on VIVADO

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Hello,

     I'm not sure there is anyone can help us to solve or give a direction for the following question.

    Our system is a PC base system and transfers huge data through a third party PCIE IP in FPGA boards. The FPGA boards and the PCIE IP driver were developed by ourself.

     In normal condition, the system works correctly and goes well. But, when the FPGA boards set up on the AMD CPU motherboard - ASRock RACK EPYCD8-2T, it became really weird. We found the data from PCIE DMA easily lost, and system became unstable. But, it would run "very well" when we opened the VIVADO Hardware Manager and connected to the FPGA target on the boards. We guessed the phenomenon could be caused by the driver, but don't have any idea or direction to solve this issue. Is there anyone can provide some suggestions to us for analyzing or solving this issue? Thank you.

Regards,

Peter

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deepeshm
Xilinx Employee
Xilinx Employee
389 Views
Registered: ‎08-06-2008

Have you check the link stability?

Please refer to ARs below for debugging information:

https://www.xilinx.com/support/answers/56616.html

https://www.xilinx.com/support/answers/72471.html

Thanks.

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2 Replies
deepeshm
Xilinx Employee
Xilinx Employee
390 Views
Registered: ‎08-06-2008

Have you check the link stability?

Please refer to ARs below for debugging information:

https://www.xilinx.com/support/answers/56616.html

https://www.xilinx.com/support/answers/72471.html

Thanks.

View solution in original post

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peterlo8
Observer
Observer
362 Views
Registered: ‎11-21-2018

Hi deepeshm,

     Thank you ver much for your reply and information. We'll refer to this documentation for more details.

But, we still think this phenomenon couldn't be caused by the link trainning issue but the software driver.

If it caused by the PCIE link trainning failure, I think VIVADO Hardware Manager can't make it better through JTAG.

Thanks.

 

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