Artix-7 DMA/PCIe bridge solution that supports scatter/gather and read/writes to/from PCIe memory initiated by the FPGA
The AC701 TRD would appear to give me the solution I require, but it makes use of a North-West-Logic IP core. Can anyone suggest a way to replicate the operation of the design in this TRD, but using only Xilinx IP? The target chip has to be Artix-7.
I have worked with the AC701 board before, and I would recommend using the XDMA IP. You can create an XDMA example design (targeting the Artix-7) that will work on your development board. You can also edit the example design to use the DDRAM on the AC701 if you want it to be more similar to the AC701 TRD. You'll probably need the XDMA driver.