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southernduck
Explorer
Explorer
2,256 Views
Registered: ‎07-09-2014

B_PCIE_3_0: CFGPHYLINKSTATUS keep low

Hi,

 

I am simulating pcie3_7x_0_ex in VCSMX and the CFGPHYLINKSTATUS of B_PCIE_3_0 keeps low which results in user_reset asserted and failed to pass the test.

 

The same test passed in Vivado simulation.

Any suggestions?

 

thanks.

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12 Replies
venkata
Moderator
Moderator
2,187 Views
Registered: ‎02-16-2010

which vivado version are you using?

can you check by changing VCS command line args DEBUG_PP to DEBUG or DEBUG_ALL?
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southernduck
Explorer
Explorer
2,170 Views
Registered: ‎07-09-2014

Hi,

I'm using Vivado 2016.4.
And I am using -debug_all as command line arg.

Thanks
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southernduck
Explorer
Explorer
2,143 Views
Registered: ‎07-09-2014

Vivado 2016.3 failed, too.
Could you please help to take a look?
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venkata
Moderator
Moderator
2,109 Views
Registered: ‎02-16-2010

Can you please share the .xci file of the IP?
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southernduck
Explorer
Explorer
2,096 Views
Registered: ‎07-09-2014

Where should I upload it to?
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southernduck
Explorer
Explorer
2,092 Views
Registered: ‎07-09-2014

You can generate the .xci file by simply using default settings.
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venkata
Moderator
Moderator
2,020 Views
Registered: ‎02-16-2010

I tried the simulation of IP example design with the default options of the GUI. The simulation has successfully completed with VCS simulator 2016.06. I have attached .xci file of the IP used to test. 

 

If you can give the .xci file of the IP with you, it can help to use the same IP that you are using.

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southernduck
Explorer
Explorer
2,014 Views
Registered: ‎07-09-2014

Attached, thanks in advance.

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venkata
Moderator
Moderator
1,851 Views
Registered: ‎02-16-2010

apologies for the long delay in responding. I find the issue you have reported is specific to VCS simulator. The IP example design is simulating successfully with Questasim simulator.

I find RP is stuck and serial lines are not toggling with VCS simulator.

Is it possible for you to use the latest vivado release?
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venkata
Moderator
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Registered: ‎02-16-2010

I am checking for any known issues specific to the vivado release you are using. I will update you with my findings.
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southernduck
Explorer
Explorer
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Registered: ‎07-09-2014

Hi Venkata,

Thank you for reply.
2018.2 tested, failed.
Could you please take a look?

Thanks & Best Regards,
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venkata
Moderator
Moderator
1,364 Views
Registered: ‎02-16-2010

Can you check the solution mentioned in the AR#67172? I found the simulation is running fine after updating the options during the elaborate stage. I checked this in 2016.3 and 2018.2.
https://www.xilinx.com/support/answers/67172.html

 

If you are using the GUI flow, try to do the setting as shown in the snapshot below.

vcs_67172.PNG

 

One more thing to note, please check the OS support for the VCS simulator version you are using. When I tried the simulation in Ubuntu 16.04.03 OS, I got a warning message saying the OS is not supported in the vlogan.log file.

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