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ramenaid
Visitor
Visitor
3,950 Views
Registered: ‎01-26-2011

BAR2 User Registers

 

Hi
I am using a Virtex 6 - LX240T board and am trying to read and write data to the user registers. However when I try to do so , the wr_rdy and rd_rdy never go active and always show a value of 'U' (unassigned).
Below is the code I am using to write to the registers.
WR_ADDR     <= ("0000" & x"004");
  WR_BE       <= "1111";
  WR_DATA     <= x"FFFFFFFF";
  wait until rising_edge(PCIE_CLK);
  wait for 1 ns;
  WR_EN       <= '1';
  wait until rising_edge(PCIE_CLK);
  wait for 1 ns;
  WR_EN       <= '0';
while WR_RDY = '0' loop
  wait until rising_edge(PCIE_CLK);
  wait for 1 ns;
  end loop;

 

 

Thanks!

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2 Replies
deepeshm
Xilinx Employee
Xilinx Employee
3,935 Views
Registered: ‎08-06-2008

Hi, does the example design that comes with the core work correctly?

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ramenaid
Visitor
Visitor
3,921 Views
Registered: ‎01-26-2011

yes it does... does this problem relate to accessing the configuration space registers of the PCIe core. If so how do I go about this?

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