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kapsy_27
Adventurer
Adventurer
9,680 Views
Registered: ‎07-04-2013

Cant access internal registers of 32-bit Initiater/Target for PCI through pcitree

Hi,

I am using 32-bit Initiater/Target for PCI in a spartan-3 device, and defined some internal registers which I want to write and read. I have defined BAR0 as I/O and address space of 128 bytes. and written the following code to access the registers:

 

elsif CLK'event and CLK = '1' then

case (ADDR(9 downto 2)) is

 

--- ADDRESS 0x00 FOR reg0

 

when x"00" => reg_hit <= reg0;

if bar_0_wr = '1' and S_DATA_VLD = '1' then

reg0 <= ADIO;

end if;

 

--- ADDRESS 0x04 FOR reg1----

 

when x"01" => reg_hit <= reg1;

if bar_0_wr = '1' and S_DATA_VLD = '1' then

reg1 <= ADIO;

end if;

 

--- ADDRESS 0x08 FOR reg2----

 

when x"02" => reg_hit <= reg2;

if bar_0_wr = '1' and S_DATA_VLD = '1' then

reg2 <= ADIO;

end if;

 

--- ADDRESS 0x0C FOR reg3---

 

when x"03" => reg_hit <= reg3;

if bar_0_wr = '1' and S_DATA_VLD = '1' then

reg3 <= ADIO;

end if;

 

When I program the FPGA and try to access these registers through pcitree, I am not able to access these registers. Do I require any driver to read/write the registers through pcitree. Following is the image read by the pcitree.

BAR0.bmp
IO Address space.bmp
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5 Replies
kapsy_27
Adventurer
Adventurer
9,612 Views
Registered: ‎07-04-2013

Please can anyboady suggest me anything...!

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vsrunga
Xilinx Employee
Xilinx Employee
9,609 Views
Registered: ‎07-11-2011

Hi,

 

What is your machine configuration?

Please go through FAQs and related discussions from below links and check if they give you any clues

 

http://www.pcitree.de/userguide.html#Concerns

 

http://forums.xilinx.com/t5/PCI-Express/PCI-tree-for-64-bit-machine/td-p/219183

 

 

Hope this helps

 

-Vanitha

 

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kapsy_27
Adventurer
Adventurer
9,596 Views
Registered: ‎07-04-2013

Mine is 32-bit-machine.

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kapsy_27
Adventurer
Adventurer
9,494 Views
Registered: ‎07-04-2013

I am able to access these registers when I define BAR0 in Memory space instead of I/O space. what might be the reason? is it because of the system does not have any I/O space left to accommodate my device thats why I am not able to access these registers, since I/O space is limited and fragmented.

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kotir
Scholar
Scholar
9,435 Views
Registered: ‎02-03-2010

Hi ,

 

I think if it is memory you can do posted writes of bigger size (multi DW).

For I/O you can do only 1 DW writes. May be the you have to do update for one location at a time.

Have you tried it ?

 

Regards,

KR

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