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Registered: ‎01-06-2011

Delay in completion with data to root complex using PCIe endpoint block plus v1.14



I have an intel architecture platform using WinCE OS. When the system root complex sent a memory read request to my endpoint, without any delay, I sent back a completion with data back to root complex. Everything seems ok.


But if I sent back the completion with data after a delay of ~200ns, the WinCE OS will hang. The reason for the delay is because I am reading a slow device to get the data, before sending back the completion. It happens consistently.


When I try on a normal PC with PCItree applicaton, the application will also hang if I delay the completion with data back to root complex. How should I tell the root complex that the memory read request, my completion with data transaction will be delay???





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Xilinx Employee
Xilinx Employee
Registered: ‎04-06-2010

I would recommend reading through the PCI Express Specification for this question.  The completion timeout mechanism is documented there.  Make sure to read through the appropriate spec; gen 1 or gen 2.

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