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scriptblue
Visitor
Visitor
4,792 Views
Registered: ‎02-12-2010

Endpoint not powering up correctly

After verifying that my board is indeed not broken, and neither is my FAE's I set out to find a way in which I could have my SP605 PCIe endpoint enumerate. After some experimentation I am now able to get the endpoint to reliably enumerate everytime, however in order to do this I have to turn the board on after the PC boots but before the OS loads. If I leave the board plugged in and turned on it won't leave reset because the GTP's PLL isn't locking so the device ends up not enumerating. But if I have the board turned off then power my computer on and then power the SP605 board before the operating system loads everything works just fine and the PCIe device is able to enumerate and communicate with its driver. This is the only way I have been able to get 2 SP605 boards to enumerate in 2 different motherboards. I am loading the image from PROM (x4 SPI), all 4 of the SysAce switches on SW1 are OFF, no CF card is present, and M1 is OFF, M0 is ON. Allowing the system to boot with the board turned on, then JTAGing the board (in effect reseting everything on the FPGA) still does not do the trick. It seems that the board has to be off when the computer boots.

 

I have tried rebooting the computer once I got the device to work however an entire SP605 board reset is needed to have it reenumerate. I have also tried having one of the GPIO buttons keep the core in reset while being pressed. Holding the core in reset until the system reaches POST (when I would otherwise turn the board on) does not seem to do the trick either.

 

I am using the unmodified example vhdl project that ships with version 2.2 of the core in ISE 12.4. All speed patches are up-to-date (as of 2/15).

 

 

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3 Replies
gszakacs
Professor
Professor
4,762 Views
Registered: ‎08-14-2007

It's hard to imagine how the endpoint would not start up the same after delayed power up

or delayed release of reset.  It might be interesting to check if the ICS874001 is providing

the clock properly in the case of powering up before the PC boots.

 

-- Gabor

-- Gabor
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luisb
Xilinx Employee
Xilinx Employee
4,727 Views
Registered: ‎04-06-2010

Would you happen to know how long it takes to configure your device? You may need to look at the configuration guide to calculate this. If it's higher than 200ms from power up, then this may be expected behavior.

Also, can you let us know If this enumerates with a warm reset(reboot)? This is different than a cold boot, which is what you're doing.
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scriptblue
Visitor
Visitor
4,706 Views
Registered: ‎02-12-2010

It seems that the board configures almost instantly, it's definitely less than a second but I'm not sure if it's less than 200ms. I am not able to reboot and still have the board reenumerate. I have to cycle power to the board to get it to re-enumerate.

 

Thinking that maybe the ATX connector loses power temporarily during the reboot process, I removed the ATX connector and powered the board with the charger. Not even in this case is it able to reenumarate without a power cycle.

 

I doubt it's the motherboard but just to make sure I'll test it out with an ML605.

 

Edit: Everything seems to work fine if I tie sys_reset_n_c high ( sys_reset_n_c <= '1' ;  ) trn_lnk_up asserts after 2 or 3 seconds after the computer boots.

The problem now is I can't reset the core normally. Since I've tested this project (the sample Spartan 6 PCIe LogiCore v2.2 sample project) with 2 boards and 4 different computers, I'm don't think this is a board or core problem. Could the sample design be at fault?

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