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Anonymous
Not applicable
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Fpga Board detection on INTEL motherboard S5000XVN and S3210SHLC using PCIe

I have three motherboards.

1. D945GCCR (reference motherboard)

2. S5000XVN

3. S3210SHLC

 

Th FPGA board that I have supports x8 mechanical connector. The Xilinx BMD design that I have implemented just uses single lane so actually it is configured to operate in x1 mode. The S5000XVN motherboard has three PCIe slots. Two are with x8 mechanical slots supporting x4 mode and the one is with x16 mechanical slot supporting upto x16 mode. ================================

Total Mechanical Mode

================================

2       x8            x4

1       x16         x16

 

The x16 slot houses NVidia VGA card on the motherboard. So we are left with the remaining two slots. Theoretically, my BMD design should work on all these slots as it is supported both mechanically and mode wise as well (only implemented x1 mode on the FPGA board). However, the problems that I have mentioned remain the same. On this particular motherboard, I get garbage data mixed with actual data. So I am able to get expected data but there are few locations read out as garbage values. Interestingly, when I use the same FPGA board on reference machine with intel motherboard (D945GCCR) with x16 mechanical connector supporting upto x16 mode, the same FPGA board behaves as expected with NO garbage values. Now lets have a look at the second mother board which is S3210SHLC. This particular motherboard has the following PCIe slots with mechanical slots and lane modes supported.

================================

Total Mechanical Mode

================================

1                    x8                            x4

1                    x8                            x8

1                    x16                          x8

 

On this particular motherboard, the behavior is totally different. I have four identical Avnet FPGA boards, all loaded with the same bitstreams. All these boards are successfully detected on S5000XVN motherboard and on a reference motherboard but the strange thing about the subject motherboard (S3210SHLC) is, there is only one FPGA board out of those four FPGA boards which gets detected on this motherboard, the rest of the FPGA boards are not detected on OS bootup. The other problem which is common in this motherboard and the previous motherboard is, when the same FPGA board is plugged into the x8 mechanical slot supporting x4 lanes, I get garbage values coming out of the FPGA along with actual data. But when plugged in x8 and x16 mechanical slots supporting x8 modes on both the slots, the data is read out perfectly. I have been able to establish one common thing in all these tests. All those PCIe slots which mechanically support x8 PCIe cards but downgraded to support upto x4 lanes create problems. All those slots which mechanically support x8 connector FPGA card and support x8 lane mode works fine. The other FPGAs not getting detected and only one getting detected is still confusing.

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Anonymous
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So if I summarize your motherboard problem having spitting garbage 
values and map it on the same table you provided, is this how it will 
look like? 

S5000XVN motherboard 
========================================= 
 Total           Mechanical              Mode       Test Rsults 
 ======================================== 
 2                   x8                           x4 
FAIL(garbage values) 
 1                   x16                        x16           couldnot 
test, slot not available 

S3210SHLC motherboard 
======================================= 
 Total           Mechanical              Mode      Test Rsults 

 ====================================== 
 1                   x8                           x4 
FAIL(garbage values) 
 1                   x8                           x8       PASS 
 1                   x16                         x8       PASS 

D945GCCR   (reference motherboard) 
======================================= 
 Total           Mechanical          Mode        Test Rsults 

 ====================================== 
 1                   x16                      x16           PASS 

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Anonymous
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We just carried out more tests regarding the problem in which we are 
unable to detect the FPGA boards on one particular motherboard. We 
took out three signals from the BMD design onto the Avnet board LEDs. 

1. trn_lnk_up_n 
2. trn_reset_n 
3. sys_rst_n 

We observed the following behaviour: 
PCIe Slot 1 (x8 mechanical, x4 electrical): On system boot up, 
sys_rst_n and trn_reset_n are asserted and then deasserted. The 
trn_lnk_up is also asserted (active low) 
showing successful link establishment. Board is detected on this slot 
by the OS. 

PCIe Slot 2 (x8 mechanical, x8 electrical): On system boot up, 
sys_rst_n and trn_reset_n are asserted. sys_rst_n is deasserted but 
trn_reset_n kept asserted. The trn_lnk_up  does not get asserted, 
obviously because of trn_reset_n still asserted. Board is not detected 
on this slot by the OS. 

PCIe Slot 3 (x16 mechanical, x8 electrical): On system boot up, 
sys_rst_n and trn_reset_n are asserted. sys_rst_n is deasserted but 
trn_reset_n kept asserted. The trn_lnk_up  does not get asserted, 
obviously because of trn_reset_n still asserted. Board is not detected 
on this slot by the OS. 

We tried changing the jumper on JP5 to show the lane width but it did 
not help out as well (BTW should it help?). 

The other problem is somehow related to the slot which is electrically 
downgraded than the mechanical slot provided e.g. problem on a PCIe 
slot with x8 mechanical and x4 electrical. We have verified the same 
behavior on the two motherboards and whenever we plug in the FPGA 
board with different electrical and mechanical specs(only happens with 
x4 electrical and x8 mechanical slots), the problem of getting garbage 
data (or misalligned data !! so that it appears as if it is a garbage) 
happens. Anything to do with setting the DMA TLP size? At the same 
time, when we plug the same FPGA board on a PCIe slot with x8 
electrical and x16 mechanical the problem disappears and things work 
perfectly fine (may be the board supports x8 mode so does the slot !). 

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