11-15-2020 06:19 PM
I want to find the LTSSM FSM part of code in PCIE IP, can you please help.
I can see that pl_ltssm_state starts from pcie_block_i module. But I cannot find that module description.
Is that module body hidden from the User?
Issue reason, my LTSSM is not working good, so I want to debug LTSSM FSM verilog code to see what it get stack and detect phase.
11-15-2020 06:54 PM
You can find the definition in PG213 for the signal name cfg_ltssm_state
11-15-2020 08:46 PM - edited 11-15-2020 08:53 PM
But I am using 7 series FPGA (Virtex 7). Seems there is no such signal there, instead pl_ltssm_state is there.
But I cannot find its FSM verilog code nowhere...
Some more info:
When I track the pl_ltssm_state signal, I can see that it codes to: pcie_7x_0_support_i->pcie_7x_0_i->inst->inst->pcie_top_i->pcie_7x_i-> pcie_block_i
Now the pcie_block_i type is PCIE_2_1. I wanted to see the body of that module. I think the LTSSM code is there, but I cannot find it anywhere.
Is that confidential and now open for the user?
11-15-2020 10:39 PM
This FSM in the HARD IP but it is compliance with the LTSSM FSM in PCIe spec.
You can find the name of every state in PG054 and find more info about the conditions to go to the next state in PCIe spec 8.4.9