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Registered: ‎09-10-2015

K7 xdma

Hi support,

 I use xdma base on K7 fpga as endpoint. It can transfer data to pc base on ububtu operation system. And I write a simple linux drive to do this.

 I use msi interrupt and enable two user interrupt. The driver can handle all of interrupt from xdma.But I find a strange problem. Pc always receive once interrupt that driver never enabled every transfer operation.I try to read interrupt request register and the value always zero. Why xdma can transmission a interrupt  witt "IRQ Block User Interrupt Request" and "IRQ Block Channel Interrupt Request" value equal zero?

static irqreturn_t handl_irq(int irq, void *dev_id)
{
struct edw_priv *ipd = dev_id;
u32 tmp_0;
u32 tmp_1;

tmp_0 = read_register(&interrupt_regs->channel_int_request);  //IRQ Block Channel Interrupt Request 
tmp_1 = read_register(&interrupt_regs->user_int_request); //IRQ Block User Interrupt Request
printk("%d %d\n",tmp_0,tmp_1);
if(tmp_0 & CHANNEL_IRQ_ENABLE_C2H0){

tasklet_schedule(&ipd->tasklet_c2h0);

}
if(tmp_0 & CHANNEL_IRQ_ENABLE_C2H1){
tasklet_schedule(&ipd->tasklet_c2h1);
}

if(tmp_1 & USER_IRQ_ENABLE_0){
tasklet_schedule(&ipd->tasklet_c2h0_vdma);
}
if(tmp_1 & USER_IRQ_ENABLE_1) {
tasklet_schedule(&ipd->tasklet_c2h1_vdma);
}

[ 5109.330928] 0 1
[ 5109.332756] 0 0
[ 5109.334711] 4 0
[ 5109.364258] 0 1
[ 5109.366135] 0 0
[ 5109.368074] 4 0
[ 5109.397583] 0 1
[ 5109.399494] 0 0
[ 5109.401403] 4 0
[ 5109.430922] 0 1
[ 5109.432740] 0 0
[ 5109.434678] 4 0
[ 5109.464233] 0 1
[ 5109.466163] 0 0
[ 5109.468099] 4 0
[ 5109.497552] 0 1
[ 5109.499459] 0 0
[ 5109.501395] 4 0
[ 5109.530876] 0 1
[ 5109.532692] 0 0
[ 5109.534628] 4 0
[ 5109.564200] 0 1
[ 5109.566087] 0 0
[ 5109.568021] 4 0
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117 Views
Registered: ‎09-10-2015

 "0 1" means pc receive a user interrupt from xdma. "4 0" means pc receive a c2h complete transfer interrupt. But ,why PC can receive a interrupt but both value of request register is zero?

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